saa7115 NXP Semiconductors, saa7115 Datasheet - Page 3

• Manufacturer Part Number: saa7115
• Description: Ntsc/pal/secam 9-bit Video Decoder
• Manufacturer: NXP Semiconductors

DECODER
CONTROL
OUTPUT
Y Cb Cr S
H PORT
Video acquisition and clock generation features
The analog pre-processing circuit incorporates source selection,
anti-aliasing filters and two low-noise analog-to-digital converters.
This sub-system includes input clamps, white-peak control and
user-selectable automatic or fully programmable gain control to
match specific signal properties.The 9-bit low-noise CMOS
analog-to-digital converters provide high performance with
oversampling at 27 MHz – twice the ITU-601 standard.
On-chip line-locked clock generation also complies with ITU-601
and offers free-running capability with horizontal and vertical
synchronization generation.
• Six analog inputs with internal analog source selectors, e.g. 6x
• Two built in analog anti-aliasing filters
• Dual 9-bit low noise analog-to-digital converters with
• Fully programmable static gain or automatic gain control
• Automatic Clamp Control (ACC) for CVBS,Y and C
• Switchable white peak control
• Requires only one crystal (32.11 MHz or 24.576 MHz) for all
• Independent gain and offset adjustment for raw data path
• On-chip line locked clock generation according to ITU-601
• Generation of a frame locked audio master clock to support a
• Second onboard analog PLL can be used for:
• Versatile universal VBI-data decoder, slicer, clock regeneration
CVBS or (2 x YC and 2 x CVBS) or (1 x YC and 4 x CVBS)
2x-oversampling
(AGC) for the selected CVBS or Y/C channel
standards
constant number of audio clocks per video field
- on-chip line-locked square pixel clock generation for PAL and
- optional generation of a low jitter frame-locked audio clock
and byte synchronization for:
- WST 525/625 Teletext
- VPS
X PORT
X PORT
NTSC square pixel video output or
from the audio master clock, through reuse of the analog
square pixel PLL. Supports audio clock frequencies of 256*fs,
384*fs and 512*fs (fs = 32 kHz, 44.1 kHz or 48 kHz).
Y Cb Cr S
SYNC
DATA
AND
Y Cb Cr
CONTROL
TASK AND EVENT CONTROLLER
UNIVERSAL VBI ENGINE
BCS
I
2
C PORT
I
2
C
FIR-PREFILTER
PROCESSING
PROCESSING
HORIZONTAL
VERTICAL
SCALER
CLOCKS
CLOCKS
AUDIO
I
2
S
FORMATTER
BOUNDARY
OUTPUT
I PORT
VIDEO
SCAN
AND
FIFO
MSD805
8- or 16-BIT
SCALED
DATA
• Flexible VBI read back via industry standard I
Video decoder features
The decoder in the SAA7115 is based on the principle of
line-locked clock decoding, yielding the highest quality video with
maximum discrimination and automation.The decoder features
advanced two-dimensional chrominance/luminance separation using
a dynamically adaptive comb filter.
• Digital PLL for synchronization and clock generation for all stan-
• Automatic detection of 50 Hz / 60 Hz field frequency, and auto-
• Enhanced horizontal and vertical sync detection
• Luminance and chrominance signal processing for PAL BGDHIN,
• High performance 2/4-line comb filter for two-dimensional
• Independent Brightness Contrast Saturation (BCS) adjustment
• User programmable sharpness control
• Automatic TV/VCR detection
• X-port video output as:
• Certification for detection of copy protected input signals:
- US/European Close Captioning (CC)
- WSS 525/625 (CGMS)
- US NABTS
- VITC 525/625
- Gemstar
- Moji Japanese Teletext.
following decoded data types:
- US/European Close Captioning (CC)
- WSS 525/625 (CGMS)
- Gemstar
dards and from non-standard video sources, e.g. consumer grade
VCR
matic recognition of all common broadcast standards
combination-PAL N, PAL M, NTSC M, NTSC-Japan, NTSC 4.43
and SECAM (50 Hz / 60 Hz)
chrominance/luminance-separation operating with dynamically
adaptive comb filter parameters
- noise shaped 8-bit ITU-656 video or
- full 10-bit ITU-656 interface (DC-performance 9-bit).
- according to Macrovision’s Copy Protection Detect
- indicating level of protection.
Specification Revision 1.00
SAA7115
Leading Competitor
®
®
1x/2x
1x/2x.
Leading Competitor
SAA7115
2
C-bus of the