at40k20al-1dqc ATMEL Corporation, at40k20al-1dqc Datasheet - Page 19

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at40k20al-1dqc

Manufacturer Part Number
at40k20al-1dqc
Description
At40k05al 5k - 50k Gates Coprocessor Fpga With Freeram
Manufacturer
ATMEL Corporation
Datasheet
Primary, Secondary and
Corner I/Os
Primary I/O
Secondary I/O
Corner I/O
2818F–FPGA–07/06
The AT40KAL has three kinds of I/Os: Primary I/O, Secondary I/O and a Corner I/O.
Every edge cell except corner cells on the AT40KAL has access to one Primary I/O and
two Secondary I/Os.
Every logic cell at the edge of the FPGA array has a direct orthogonal connection to and
from a Primary I/O cell. The Primary I/O interfaces directly to its adjacent core cell. It
also connects into the repeaters on the row immediately above and below the adjacent
core cell. In addition, each Primary I/O also connects into the busing network of the
three nearest edge cells. This is an extremely powerful feature, as it provides logic cells
toward the center of the array with fast access to I/Os via local and express buses. It can
be seen from the diagram that a given Primary I/O can be accessed from any logic cell
on three separate rows or columns of the FPGA. See Figure 12 on page 20.
Every logic cell at the edge of the FPGA array has two direct diagonal connections to a
Secondary I/O cell. The Secondary I/O is located between core cell locations. This I/O
connects on the diagonal inputs to the cell above and the cell below. It also connects to
the repeater of the cell above and below. In addition, each Secondary I/O also connects
into the busing network of the two nearest edge cells. This is an extremely powerful fea-
ture, as it provides logic cells toward the center of the array with fast access to I/Os via
local and express buses. It can be seen from the diagram that a given Secondary I/O
can be accessed from any logic cell on two rows or columns of the FPGA. See
Figure 13 on page 20.
Logic cells at the corner of the FPGA array have direct-connect access to five separate
I/Os: 2 Primary, 2 Secondary and 1 Corner I/O. Corner I/Os are like an extra Secondary
I/O at each corner of the array. With the inclusion of Corner I/Os, an AT40KAL FPGA
with n x n core cells always has 8n I/Os. As the diagram shows, Corner I/Os can be
accessed both from the corner logic cell and the horizontal and vertical busing networks
running along the edges of the array. This means that many different edge logic cells
can access the Corner I/Os. See Figure 14 on page 21.
AT40KAL Series FPGA
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