at60142h-ds15msv ATMEL Corporation, at60142h-ds15msv Datasheet - Page 6

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at60142h-ds15msv

Manufacturer Part Number
at60142h-ds15msv
Description
Rad Hard 512k X 8 Very Low Power Cmos Sram
Manufacturer
ATMEL Corporation
Datasheet
Data Retention Mode
Data Retention Characteristics
7834A–AERO–10/09
Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage
and supply current are guaranteed over temperature. The following rules insure data
retention:
1. During data retention chip select CS must be held high within
2. Output Enable (OE) should be held high to keep the RAM outputs high imped-
3. During power-up and power-down transitions CS and OE must be kept between
4. The RAM can begin operation > t
Figure 1. Data Retention Timing
1.
2.
Parameter
V
t
t
I
CDR
R
CCDR
CCDR
ance, minimizing power dissipation.
V
voltages (3V).
CC
(2)
+ 0.3V and 70% of
T
CS = V
AVAV
Description
V
Chip deselect to data retention time
Operation recovery time
Data retention current
= Read cycle time.
CC
CC
, V
for data retention
IN
= GND/V
V
CC
CC
.
.
R
ns after
V
t
CC
AVAV
Min
2.0
0.0
reaches the minimum operation
(1)
Typ T
0.700
A
= 25⋅C
V
CC
to
V
Max
CC
1.5
-0.2V.
Unit
mA
ns
ns
V
6

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