at60142f ATMEL Corporation, at60142f Datasheet

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at60142f

Manufacturer Part Number
at60142f
Description
Rad Hard 512k X 8 Very Low Power Cmos Sram
Manufacturer
ATMEL Corporation
Datasheet
Features
Description
The AT60142F/G is a very low power CMOS static RAM organized as 524 288 x 8
bits.
Atmel brings the solution to applications where fast computing is as mandatory as low
consumption, such as aerospace electronics, portable instruments, or embarked
systems.
Utilizing an array of six transistors (6T) memory cells, the AT60142F/G combines an
extremely low standby supply current (Typical value = 1 mA) with a fast access time at
15 ns or better over the full military temperature range. The high stability of the 6T cell
provides excellent protection against soft errors due to noise.
The AT60142F/G is processed according to the methods of the latest revision of the
MIL PRF 38535 or ESCC 9000.
It is produced on a radiation hardened 0.25 µm CMOS process.
Operating Voltage: 3.3V
Access Time:
Very Low Power Consumption
Wide Temperature Range: -55 to +125°C
TTL-Compatible Inputs and Outputs
Asynchronous
Designed on 0.25 µm Radiation Hardened Process
No Single Event Latch Up below LET Threshold of 80 MeV/mg/cm
Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019
500 Mils Wide FP36 Package
ESD Better than 4000V
Quality Grades: ESCC with 9301/052, QML-Q or V with smd 5962-05208
– 15 ns (AT60142F)
– <15 ns (AT60142G in development, prototypes in Q4 2007)
– Active: 650 mW (Max) @ 15 ns, 540 mW (Max) @ 25 ns
– Standby: 3.3 mW (Typ)
2
Rad Hard
512K x 8
Very Low Power
CMOS SRAM
AT60142F
AT60142G
Rev. 4408F–AERO–07/07
1

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at60142f Summary of contents

Page 1

... Quality Grades: ESCC with 9301/052, QML with smd 5962-05208 Description The AT60142F very low power CMOS static RAM organized as 524 288 x 8 bits. Atmel brings the solution to applications where fast computing is as mandatory as low consumption, such as aerospace electronics, portable instruments, or embarked systems ...

Page 2

Block Diagram Pin Configuration 4408F–AERO–07/ A18 A17 A16 A15 I/O1 I/ I/O2 I/O7 9 Vcc 28 ...

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... Pin Description AT60142F/G 3 Table 1. Pin Names Name A0 - A18 I/ Vcc GND (1) Table 2. Truth Table Note: 1. L=low, H=high Z=high impedance. Description Address Inputs Data Input/Output Chip Select Write Enable Output Enable Power Supply ...

Page 4

Electrical Characteristics Absolute Maximum Ratings* Supply Voltage to GND Potential:.........................-0.5V + 4.6V DC Input Voltage:........................................GND -0.5V to 4.6V DC Output Voltage High Z State: ................GND -0.5V to 4.6V Storage Temperature: ................................... -65° 150°C Output Current Into Outputs (Low): ...

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... mA TAVAV out mA TAVAW out AT60142F/G 5 Minimum Typical -1 -1 – 2.4 Output Disabled. CC TAVAV/TAVAW Test Condition AT60142F-15 – – µ µ GND max GND max. IL ...

Page 6

Data Retention Mode Data Retention Characteristics 4408F–AERO–07/07 Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage and supply current are guaranteed over temperature. The following rules insure data retention: 1. During data retention chip select CS ...

Page 7

... AC Characteristics Figure 2. AC Test Loads Waveforms AT60142F/G 7 Temperature Range:................................................ -55 +125°C Supply Voltage:........................................................ 3.3 +0.3V Input Pulse Levels: .................................................. GND to 3.0V Input Rise and Fall Times:....................................... 3ns (10 - 90%) Input and Output Timing Reference Levels: ............ 1.5V Output Loading I /I :............................................ See Figure 4408F–AERO–07/07 ...

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... TWHQX Write high to low Z Notes: 1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.) Figure 3. Write Cycle 1. WE Controlled, OE High During Write E Figure 4. Write Cycle 2. WE Controlled, OE Low E 4408F–AERO–07/07 AT60142F- ( ...

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... The internal write time of the memory is defined by the overlap of CS Low and W LOW. Both signals must be activated to initiate a write and either signal can terminate a write by going in active mode. The data input setup and hold timing should be refer- enced to the active edge of the signal that terminates the write. Data out is high impedance if OE= V AT60142F/G 9 (1) . ...

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... Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.) Figure 6. Read Cycle nb 1: Address Controlled ( Figure 7. Read Cycle nb 2: Chip Select Controlled ( 4408F–AERO–07/07 (1) (1) (1) ( AT60142F-15 Unit ...

Page 11

... AT60142F-DS15M-E 5962-0520802QYC 5962-0520802VYC 5962R0520802VYC (3) AT60142F-DS15-SCC (1) AT60142F-DD15M-E (1) (2) AT60142F-DD15MSV Note: 1. Contact Atmel for availability. 2. Will be replaced by SMD part number when available. 3. Will be replaced by ESCC part number when available. AT60142F/G 11 Speed 25°C 15 ns/3.3V -55° to +125°C 15 ns/3.3V -55° to +125°C 15 ns/3.3V -55° ...

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... Flat Pack (500 Mils) Notes: 1. package DC : lid is NOT connected to GROUND 2. package DS : lid is connected to GROUND Document Revision History Rev. F 4408F–AERO–07/07 1. Split datasheet into two separate documents: removed AT60142FT from this document. Please refer to document 7726 on the Atmel web site. 12 ...

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... Fax: (81) 3-3523-7581 Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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