cy8c5246pvi-092 Cypress Semiconductor Corporation., cy8c5246pvi-092 Datasheet - Page 19

• Manufacturer Part Number: cy8c5246pvi-092
• Description: Programmable System-on-chip Psoc
• Manufacturer: Cypress Semiconductor Corporation.

6. System Integration
6.1 Clocking System
The clocking system generates, divides, and distributes clocks
throughout the PSoC system. For the majority of systems, no
external crystal is required. The IMO and PLL can generate up
to a 40 MHz clock, accurate to ±1% over voltage and temper-
ature. Additional internal and external clock sources allow each
design to optimize accuracy, power, and cost. All of the system
clock sources can be used to generate other clock frequencies
in the 16-bit clock dividers and throughout the device for anything
the user wants, for example a UART baud rate generator.
Clock generation and distribution is automatically configured
through the PSoC Creator IDE graphical interface. This is based
on the complete system’s requirements. It greatly speeds the
design process. PSoC Creator allows designers to build clocking
systems with minimal input. The designer can specify desired
clock frequencies and accuracies, and the software locates or
builds a clock that meets the required specifications. This is
possible because of the programmability inherent PSoC.
Table 6-1. Oscillator Summary
Document Number: 001-55034 Rev. *A
MHzECO
kHzECO
Source
Doubler
IMO
DSI
PLL
ILO
24 MHz
12 MHz
32 kHz
3 MHz
4 MHz
0 MHz
1 kHz
Fmin
±1% over voltage and temperature
Crystal dependent
Input dependent
Input dependent
Input dependent
-30%, +65%
Crystal dependent
Tolerance at Fmin
PRELIMINARY
Key features of the clocking system include:
Seven general purpose clock sources
Dedicated 48 MHz Internal Oscillator for USB that auto locks
to USB bus clock requiring no external crystal for USB. (USB
equipped parts only)
Independently sourced clock dividers in all clocks
Eight 16-bit clock dividers for the digital system
Four 16-bit clock dividers for the analog system
Dedicated 16-bit divider for the CPU bus and CPU clock
Automatic clock configuration in PSoC Creator
100 kHz
40 MHz
33 MHz
33 MHz
40 MHz
48 MHz
3 to 40 MHz IMO ±1% at 3 MHz
4 to 33 MHz External Crystal Oscillator (MHzECO)
DSI signal from an external I/O pin or other logic
24 to 40 MHz fractional Phase-Locked Loop (PLL) sourced
from IMO, MHzECO, or DSI
Clock Doubler
1 kHz, 33 kHz, 100 kHz ILO for Watch Dog Timer (WDT) and
Sleep Timer
32.768 kHz External Crystal Oscillator (kHzECO) for Real
Time Clock (RTC)
36 MHz fixed clock (available only during test mode)
32 kHz
PSoC
Fmax
®
±5%
Crystal dependent
Input dependent
Input dependent
Input dependent
-20%, +30%
Crystal dependent
5: CY8C52 Family Data Sheet
Tolerance at Fmax
10 µs max
Input dependent
250 µs max
1 µs max
1000 µs max
5 ms typ, max is
crystal dependent
500 ms typ, max is
crystal dependent
Startup Time
Page 19 of 85
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