mm908e621 Freescale Semiconductor, Inc, mm908e621 Datasheet - Page 50

• Manufacturer Part Number: mm908e621
• Description: Integrated Quad Half-bridge And Triple High-side With Embedded Mcu And Lin For High End Mirror
• Manufacturer: Freescale Semiconductor, Inc

Analog Die System Trim Values
outlined datasheet values the analog die needs to be
trimmed. For this purpose 3 trim values are stored in the
Flash memory at address $FDC4 - $FDC6. These values
have to be copied into the analog die SPI registers:
register after a reset to ensure proper trimming of the device.
System Test Register (SYSTEST)
testing and is not allowed to be written to.
System Trim Register 1 (SYSTRIM1)
HVDDT1:0 - HVDD Overcurrent Shutdown Delay Bits
50
908E621
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Reset
Reset
Read
Write
Read
Write
Table 15. HVDD Overcurrent Shutdown Selection Bits
For improved application performance and to ensure the
• copy $FDC4 into SYSTRIM1 register $0F
• copy $FDC5 into SYSTRIM2 register $10
• copy $FDC6 into SYSTRIM3 register $11
Note: This values have to be copied to the respective SPI
The System Test Register is reserved for production
These read/write bits allow to change the filter time (for
capacitive load) for the HVDD over current detection.
Reset clears the HVDDT1:0 bits an sets the delay to the
maximum value.
Note: do not write to the reserved bits
Note: do not change (set) the reserved bits
HVDDT1
reserved
HVDDT1
Register Name and Address: SYSTEST - $0E
Bit7
Bit7
0
0
Register Name and Address: IBIAS - $0F
0
0
1
HVDDT0
reserved
6
0
6
0
reserved
reserved
5
0
5
0
0
HVDDT0
reserved
reserved
0
1
0
4
0
4
0
0
ITRIM3
reserved
3
0
3
0
ITRIM2
reserved
typical Delay
2
0
2
0
950us
536us
234us
ITRIM1
reserved
1
0
1
0
ITRIM0
reserved
Bit0
Bit0
0
0
ITRIM3:0 - IRef Trim Bits
System Trim Register 2 (SYSTRIM2)
CRHBHC1:0 - Current Recopy HB1:2 Trim Bits
Reset
Read
Write
These write only bits are for trimming of the internal
current references IRef (also A0, A0CST). The provided
trim values have to be copied into these bits after every
reset. Reset clears the ITRIM3:0 bits.
These write only bits are for trimming of the current
recopy of the half-bridge HB1 and HB2 (CSA=0). The
provided trim values have to be copied into these bits
after every reset. Reset clears the CRHBHC1:0 bits.
Table 17. Current Recopy Trim for HB1:2 (CSA=0)
itrim3
0
0
0
0
0
0
0
0
1
HVDDT1
Register Name and Address: IFBHBTRIM - $10
CRHBHC1
CRHBHC1
Bit7
0
0
1
0
0
CRHBHC0
itrim2
6
0
0
0
0
0
0
1
1
1
1
0
Table 16. IRef Trim Bits
CRHB5 CRHB4 CRHB3 CRHB2 CRHB1 CRHB0
CRHBHC0
Analog Integrated Circuit Device Data
5
0
0
itrim2
HVDDT0
0
1
0
0
1
1
0
0
1
1
0
1
4
0
0
Freescale Semiconductor
itrim0
3
0
0
0
1
0
1
0
1
0
1
0
Adjustment
-10%
typical Delay
2
0
0
0
Adjustment
78us
-12%
12%
-2%
-4%
-8%
2%
4%
8%
0
1
0
0
Bit0
0
0