ml67q4051 Oki Semiconductor, ml67q4051 Datasheet
ml67q4051
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ml67q4051 Summary of contents
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... Conforms Multi-master support Typical Applications • Consumer, medical, and communications applications where small package size is important. Product Selector Part Number ML67Q4050TC ML67Q4051TC June 2006, Rev 1.2 ML67Q4060TB Data Sheet ML67Q4061TB ® -Based General Purpose Microcontroller TM core with either DD_CORE ...
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... RXD EXINT[5:1] 6 EFIQ_N VDD_CORE VDD_IO GND VDD_PLL GND_PLL TEST[2:1] 2 • Oki Semiconductor Internal FLASH ROM Flash ML67Q4050/ML67Q4060: 64KB JTAG IF ML67Q4051/ML67Q4061: 128KB Internal RAM 16KB - 7B Internal & External Memory Controller Processor Bus Boot ROM 8KB AHB IF PBIC AMBA AHB Bus APB IF IRC Exp ...
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... Multiplier (32-bit x 8-bit) - JTAG interface for debugging • Built-in Memory - SRAM: 16KBytes ( bits), 1-cycle access - Built-in Flash ROM: 128KBytes (ML67Q4051, ML67Q4061) or 64KBytes (ML67Q4050, ML67Q4060), 1-cycle access, connected to the processor bus Flash ROM programming cycle count: 100 (max.) - Boot ROM: 8KBytes • ...
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... RTC - One second generated from 32.768 kHz - Built-in 32-bit counter with one second clock - Interrupt on 32-bit comparison 4 • Oki Semiconductor FUNCTIONAL DESCRIPTION • Power Management - Low-power mode - HALT mode: Stop the clock supply to CPU and other key components - STOP mode: Stop the clock supply to CPU and all peripherals except ...
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... XD8’/PK0 71 GND 70 BOOTCLK/PD5 69 XD9/PK1 68 XD10/PK2 67 XD11/PK3 66 PC0/MISO0DSR0 65 XD12/PK4 64 XD13/PK5 63 VDD_IO 62 XD14/PK6 61 XD15/PK7 60 PC1/MOIS0/DTR0 59 PC2/SCK0/RI0 58 PC3/SSN0/DCD0 57 PC4/MISO1/DSR1 56 PC5/MOSI1/DTR1 55 XD16/PL0 54 RESET_N 53 GND 52 GND 51 RSTOUT_N/PA6/MCLK 50 PC6/SCK1/RI1 49 PC7/SSN1/DCD1 48 BS/PD4 47 XD17/PL1 46 VDD_IO 45 XD18/PL2 44 XD19/PL3 43 PE5/WS 42 XD20/PL4 41 XD21/PL5 40 XD22/PL6 39 PE6/SCK 38 GND 37 XD23/PL7 Oki Semiconductor • 5 ...
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... VDD_PLL NOTES: 1. For pins that have multiple functions, the signals are noted by their Initial / primary / secondary / tertiary functions. See Table for details balls can be connected to VDD_IO or GND. 6 • Oki Semiconductor VDD_IO PB1/ PE4/ PF2/ /RX0 SD TIMER2/ ...
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... VDD_IO VDD_CORE SYSCLK_N SYSCLK_P GND RTCCLK_P “Pin Descriptions” ML67Q4050/Q4060 Series G H PB4/ PB3/ SCL/ RX1/ 8 TXD EXINT1 PE0 VDD_IO 7 GND PE1 6 PD0/ VDD_IO AIN0/ 5 EXINT2 PD3/ TEST1 AN3 4 GND VDD_PLL 3 VDD_CORE GND_PLL 2 RTCCLK_N VDD_CORE Oki Semiconductor • 7 ...
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... PE2 VDD_IO PD0/AIN0/EXINT2 PD1/AIN1/EXINT3 PD2/AIN2 PD3/AIN3 TEST1 TEST2 NOTES: 1. For pins that have multiple functions, the signals are noted by their Initial / primary / secondary / tertiary functions. See Table for details. 8 • Oki Semiconductor ML67Q4060/61 54 64-Pin TQFP 55 56 (TOP VIEW ...
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... External DMA Control (ML67Q4050/51 Only) ML67Q4050/Q4060 Series Function Level 1st 2nd 3rd ✔ ✔ ✔ ✔ ✔ ✔ Initial Function at Reset Initial Function at Reset ✔ ✔ Initial Function at Reset ✔ ✔ ✔ ✔ ✔ ✔ ✔ ✔ ✔ Oki Semiconductor • 9 ...
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... DCD[1:0] I Data Carrier Detect – indicates that the modem has detected a carrier signal RXD I SIO asynchronous receive data input TXD O SIO asynchronous transmit data output 10 • Oki Semiconductor Description General-Purpose I/O Ports 2 S port. UART (16550) SIO Pin Configuration Function Level 1st ...
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... Power Supply ML67Q4050/Q4060 Series Function Level 1st 2nd 3rd ✔ ✔ ✔ ✔ ✔ ✔ ✔ ✔ ✔ [a] [b] ✔ ✔ ✔ ✔ — — — — — — — — — — — — — — — Oki Semiconductor • 11 ...
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... I/O SCK1 I/O RI1 PC7 I/O SSN1 I/O DCD1 PD0 I/O AIN0 I PD1 I/O AIN1 I PD2 I/O AIN2 I PD3 I/O AIN3 I PD4 I/O PD5 I/O PE0 I/O PE1 I/O PE2 I/O PE3 I/O MCLK O 12 • Oki Semiconductor Tertiary Initial/Startup Function Function Symbol I/O Symbol I/O TCK I TMS I TDI I TDO O NTRST I JTAGE EXINT1 ...
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... Oki Semiconductor • 13 ...
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... O PN4 I/O BS1_N O PN5 I/O BS2_N O PN6 I/O BS3_N O PN7 I/O OE_N O PO0 I/O WR_N O PO1 I/O PO2 I/O PO3 I/O PO4 I/O 14 • Oki Semiconductor Tertiary Initial/Startup Function Function Symbol I/O Symbol I/O EXBUSE I EXIROME I BOOT1 I Pin Configuration Package/Pin Numbers Sink 144 64 84-LF 64 Current LQFP TQFP BGA WCSP ...
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... Pin Configuration Power and Ground Pin Locations 144 Symbol LQFP V 5,25,46,63,85,101,122,128 DD_IO V 3,34,75,106 DD_CORE GND 15,16,38,52,53,71,81,99,110,124, 126,143 V 10,11 DD_PLL GND 7,8 PLL NC (No Connect) June 2006, Rev 1.2 64 TQFP 13,30,47,52,58 1,16,33,48 6,23,35,54, ML67Q4050/Q4060 Series 84-LF 64 BGA WCSP A6,A8,B1,D10,G1, B1,E2,E3,H5,H7 H3,H8,K7 A1,C9,J2,K10 C2,G2,H1,F2 A10,B3,B6,C7,D8,E2, B7,D2,E1,G3,G6 E3,J5,J9,K1,H5,H9 C1,D2 H3 C2,C3 H2 A2,A3,B2,B9,B10,C10, B8 J1,J10,K9 Oki Semiconductor • 15 ...
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... Digital power supply voltage (core) Digital power supply voltage (I/O) PLL power supply voltage [a] Memory retention voltage (SRAM) CPU operating frequency Ambient Temperature a. Memory retention voltage is the minimum voltage required to retain the contents of internal SRAM. 16 • Oki Semiconductor Symbol Conditions V DD_CORE V DD_IO V DD_PLL ...
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... Typ. Max. 1.7 — 0.3 DD_IO –0.3 — 0.7 — — 0.7 DD_IO V x 0.2 — — DD_IO V x 0.1 — — DD_IO — — — — — 0.40 — — 0.40 — — 0.50 –10 — 10 — — 150 –10 — 10 Oki Semiconductor • 17 Unit V µA Unit V µA ...
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... Pin Capacitance I DDS_CORE Current consumption I DDS_IO (STOP) I DDS_PLL I DDH_CORE I DDH_IO I DDH_PLL Current consumption (HALT) I DDH_CORE I DDH_IO I DDH_PLL 18 • Oki Semiconductor = 2. DD_IO Conditions — – DD_IO Pull-up resistance of 50 kΩ ...
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... V, V DD_IO 26.19 30.59 34.98 3.84 4.78 5.73 3.64 4.00 4.50 ML67Q4050/Q4060 Series Cont.) ° – Min. Typ. Max. — 49.9 76 — 13.78 30 — 6.56 14 — 49.9 76 — 13.78 30 — 6. Max. (mA) 76.00 30.00 13. 2 DD_CORE DD_PLL 33.333 39.38 43.78 49.90 10.83 12.37 13.78 5.15 5. DD_CORE DD_PLL 33.333 39.38 43.78 49.90 6.67 7.62 8.49 5.15 5.80 6.56 Oki Semiconductor • 19 Unit mA ° C) ° C) ...
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... INL Zero-scale error E ZS Full-scale error E FS Linearity error INL Zero-scale error E ZS Full-scale error • Oki Semiconductor ° – Condition — Analog input source Sampling impedance Ri ≤ 5 kΩ Frequency 2.25V ≤ V ≤ 2.75V = 50 kHz DD_IO ...
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... June 2006, Rev 1.2 ML67Q4050/Q4060 Series Package material Epoxy resin Lead frame material 42 alloy Pin treatment Solder plating ( 5μm) Package weight (g) 1.37 TYP Rev. No./Last Revised 5/Nov. 28, 1996 Oki Semiconductor • 21 ...
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... Therefore, before you perform re-flow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (re-flow method, temperature and times). 22 • Oki Semiconductor PACKAGE DIMENSIONS (Unit: mm) June 2006, Rev 1.2 ...
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... Therefore, before you perform re-flow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (re-flow method, temperature and times). June 2006, Rev 1.2 ML67Q4050/Q4060 Series Oki Semiconductor • 23 ...
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... Therefore, before you perform re-flow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (re-flow method, temperature and times). 24 • Oki Semiconductor PACKAGE DIMENSIONS June 2006, Rev 1.2 ...
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... Modified Logic Diagram, rotated package diagrams for LFBGA and WCSP, and edited pin names. Clarified external memories supported. Revision 1.2 June, 2006 Electrical Characteristics: Revised some DC values and added power limits. June 2006, Rev 1.2 Document Document Changes from Previous Revision ML67Q4050/Q4060 Series Date March, 2005 Oki Semiconductor • 25 ...
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... This information furnished by Oki Semiconductor in this publication is believed to be accurate and reliable. However, no responsibility is assumed by Oki Semiconductor for its use; nor for any infringements of patents or other rights of third parties resulting from its use. No license is granted under any patents or patent rights of Oki ...