sta264 STMicroelectronics, sta264 Datasheet

sta264

Manufacturer Part Number

sta264

Description

Sirius Overlay Decoder

Manufacturer

STMicroelectronics

Datasheet

1.STA264.pdf (6 pages)

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Features

■

Table 1.

July 2007

For further information contact your local STMicroelectronics sales office.

De-multiplexes the incoming overlay data

stream from the G3 Baseband processor

Maximal Ratio Combines the signals from the

three streams of data (TDM1, TDM2, COFDM)

Performs diversity combining two demodulated

soft symbol streams

Utilizes internal TDM demodulators for

diversity combining cost sensitive applications

Performs error correction on the overlay data

Closes the processing loop to control the

Diversity Combiner or accepts second L2 input

for internal combining

Presents data to external application

processors

Channels I2S data from Baseband to

Application Processors

– Data can be uncompressed audio

– Data can be "Data"

Receives SSPv2 Commands

– UART

– Parse data for Overlay and Legacy tune

– Navigation

commands

Order code

STA264TR

Device summary

STA264

TFBGA249

Package

Rev 2

■

Description

The STA264 ASIC is a fully integrated processor

for Sirius Satellite Digital Radio Service (SDARS)

that allows for decoding of Layer 2 hierarchical

data.

Controls the Baseband Processor and DSP via

UART ports

– Required so theApplication Processor can

Provides commands to the Application

Processor

Memory Interfaces

– SDR SDRAM to support the four second

– FLASH for the storage of Firmware

interface to a single client

buffer and de-interleaving

Sirius overlay decoder

TFBGA249

Tape and reel

Packing

Tray

STA264

Data Brief

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sta264 Summary of contents

Page 1

... Memory Interfaces – SDR SDRAM to support the four second buffer and de-interleaving – FLASH for the storage of Firmware Description The STA264 ASIC is a fully integrated processor for Sirius Satellite Digital Radio Service (SDARS) that allows for decoding of Layer 2 hierarchical data. Package ...

Page 2

... Application block diagram Figure 1. Application block diagram STA210N Tuner FE 2/6 FLASH 2Mx16 ADC CTRL STA264 Overlay IF ADC Data Decoder 2 Audio I2C STA240/260 STA240/260 Baseband Baseband IFAGC Processor Processor STA264 SDRAM 16M x 16 A/V decoder Data Service Processor Master Controller Data 2 Audio/I S Data AC00243 ...

Page 3

... STA264 2 Electrical characteristics 2.1 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol VDD_core Core 1.2V Power supply Voltage VDD_io IO Ring 3.3V Power Supply Voltage VDDD_pll PLL 1.2V Power supply Voltage VDDA_pll PLL 2.5V Power supply Voltage VDDA_otp OTP 2.5V Power supply Voltage VDDA_saf OTP 2.5V Power supply Voltage ...

Page 4

... OUTLINE AND MECHANICAL DATA TFBGA 240+9 (15x15x1.2mm) Thin Profile Pitch Ball Grid Array 7272773 C STA264 ...

Page 5

... STA264 4 Revision history Table 4. Document revision history Date 18-Jun-2007 13-Jul-2007 Revision 1 Initial release. 2 Updated the features section. Revision history Changes 5/6 ...

Page 6

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 6/6 Please Read Carefully: © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com STA264 ...

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