at43usb380 ATMEL Corporation, at43usb380 Datasheet

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at43usb380

Manufacturer Part Number
at43usb380
Description
On-the-go Upgrade Of The At43usb370 Usb 2.0 Full-speed Host/function Processor
Manufacturer
ATMEL Corporation
Datasheet

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Description
The AT43USB380 is a straightforward upgrade of the AT43USB370 Host/Function
Processor to support the USB 2.0 On-The-Go (OTG) specification. It can operate
either as a single-chip Host/Function Processor or if used in conjunction with an exter-
nal Atmel Charge Pump, as a full OTG solution.
The AT43USB380 is functionally equivalent to the AT43USB370 as a Host/Function
Processor and can be used in place of the AT43USB370 in the existing AT43USB370
design with minor hardware modifications. The pinout differences between the
AT43USB370 and the AT43USB380 are due to the inclusion of the on-chip OTG inter-
face in the AT43USB380.
To support OTG functionality, an external Charge Pump has to be connected to the
OTG interface of the AT43USB380, as shown in Figure 1 on page 7. The external
Charge Pump serves in the following two capacities:
1. As a power source to the downstream USB devices.
2. As a signaling interface during the OTG session negotiation upon connection.
From the hardware standpoint, the AT43USB380 is equivalent to the AT43USB370
with the following exceptions:
From the standpoint of the firmware development environment, the AT43USB380
shares the same high level APIs and low level fir mware librar ies with the
AT43USB370. Additions to the AT43USB380 firmware suite include:
The AT43USB380 share the same debugging tools with the AT43USB370 as well.
During development, the AT43USB380 should be treated as a black box in terms of
On-chip OTG Interface. This hardware block is added to the AT43USB380 to
support the OTG functionality.
DISCHARGE, PUMP, CONTROL, EN, SESS_VLD, SESS_END, SESS_HIGH
and SESS_LOW. This interface is used during an OTG session to determine the
roles of the AT43USB380 and the connected OTG-enabled USB device either as
a host or a function.
8/16/32 Bit Generic Host Processor Interface. The AT43USB380 has a variable
width, generic host processor interface whereas the AT43USB370 supports only
32-bit host interface. The width of the host interface on the AT43USB380 is
determined by firmware configuration.
Simplified System Interface. The GPIOs required in AT43USB370 for
handshaking are no longer required in AT43USB380. The system processor can
write directly to the AT43USB380 registers thus eliminates the need for PROG,
SEL, READY, DONE, MORE, INTR_IN signals. The WAIT_N signal is not needed
either. It is only there for precaution for SYS_CLK synchronization.
Up to 16 GPIO Pins. GPIO pins are multiplexed with the host processor interface.
When the interface to the host processor is 8 or 16 bits, up to 16 of the unused
pins in the host processor interface can be used as GPIO pins. High level APIs
are provided to access these GPIO pins.
High level APIs specific to the OTG support. The number of additional APIs is
less than 10.
Low level OTG firmware embedded in the AT43USB380 hardware that support
Host Negotiation Protocol (HNP) and Session Request Protocol (SRP).
Signals in the OTG interface include ID,
Note: This is a summary document. A complete document
is not available at this time. For more information, please
contact your local Atmel sales office.
On-The-Go
Upgrade of the
AT43USB370
USB 2.0
Full-Speed
Host/Function
Processor
AT43USB380
Upgrade Map
Summary
3420AS–USB–03/04

Related parts for at43usb380

at43usb380 Summary of contents

Page 1

... AT43USB370 and the AT43USB380 are due to the inclusion of the on-chip OTG inter- face in the AT43USB380. To support OTG functionality, an external Charge Pump has to be connected to the OTG interface of the AT43USB380, as shown in Figure 1 on page 7. The external Charge Pump serves in the following two capacities power source to the downstream USB devices. ...

Page 2

... AT43USB380 OTG Processor Pin Description AT43USB380 Upgrade Map Summary 2 USB functionality. Communication with the AT43USB380 is achieved through a small set (less than 25) of high level, ANSI C-compliant APIs. The actual USB protocol includ- ing HNP and SRP is transparent to the host processor. Table 1 gives the description of the pins. ...

Page 3

... AT43USB380 Upgrade Map Summary Table 1. Pin Description of the AT43USB380 (Continued) Signal Name Dir. Polarity SESS_VLD I SESS_END I SESS_LOW I SESS_HIGH I LOW_CUR O DISCHARGE O Oscillator, Clocks XTAL1 I XTAL2 O LFT I CLK_SEL I RESET_N I LO Jtag Interface TCK/SI I TDI/SCK I TDO/SO O TMS/CS I TRST_N I LO Test Pins ...

Page 4

... AT43USB380 OTG Processor Pin Assignment AT43USB380 Upgrade Map Summary 4 Table 1. Pin Description of the AT43USB380 (Continued) Signal Name Dir. Polarity Power/Ground Pins VEXT18 O VDD I VSS Pin # Signal CS_N 10 OE_N 11 WE_N 12 INTR_OUT 13 VSS 14 VDD18 15 VDD ...

Page 5

... AT43USB380 Upgrade Map Summary Pin # Signal TP0 32 TP1 33 CLK_SEL 34 VSS 35 XTAL1 36 XTAL2 37 LFT 38 VDD18 39 VDD 40 VSS TP2 44 TP3 45 RPD_EN 46 RPU_EN 47 RESET_N 48 TCK/SI 49 TMS/CS 50 VDD 51 VSS 52 TDI/SCK 53 TDO/SO 54 TRST_N 55 TP_CLK/D_CLK 56 TP_RCV_DATA/RCV_DATA 57 TP4/scan_en 58 BWIDTH[0] 59 WAKEUP_N 60 D31/GPIO[15] 61 D30/GPIO[14] ...

Page 6

... AT43USB380 Upgrade Map Summary 6 Pin # Signal 67 D27/GPIO[11] 68 D26/GPIO]10] 69 D25/GPIO[9] 70 D24/GPIO[8] 71 D23/GPIO[7] 72 D22/GPIO[6] 73 D21/GPIO[5] 74 D20/GPIO[4] 75 VDD 76 VSS 77 D19/GPIO[3] 78 D18/GPIO[2] 79 D17/GPIO[1] 80 D16/GPIO[0] 81 BWIDTH[1] 82 D15 83 D14 84 D13 85 D12 86 D11 87 VDD 88 VSS 89 D10 VSS 100 D0 Type ...

Page 7

... AT43USB380 (OTG Interface) DISCHARGE PUMP_EN LOW_CUR EN CPCLK SESS_VLD SESS_END SESS_HIGH SESS_LOW 3.3V 10 kOhm 3420AS–USB–03/04 AT43USB380 Upgrade Map Summary Figure 1. AT43USB380 USB and Charge Pump Connection for Host Mode 3.3V 15 kOhm 15 kOhm Charge Pump AT43CD001 DISCHARGE VDD PUMP_EN AC LOW_CUR EN CLK VBUS SESS_VLD ...

Page 8

... Fax: (81) 3-3523-7581 Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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