mc68hc05p9a Freescale Semiconductor, Inc, mc68hc05p9a Datasheet - Page 112

no-image

mc68hc05p9a

Manufacturer Part Number
mc68hc05p9a
Description
Hcmos Microcontroller Unit
Manufacturer
Freescale Semiconductor, Inc
Datasheet
SIOP
I/O Registers
SIOP Control
Register
112
NOTE:
The following registers control and monitor SIOP operation:
The read/write SIOP control register (SCR) contains two bits. One bit
enables the SIOP, and the other configures the SIOP for master mode
or for slave mode.
SPE — SIOP Enable
After clearing SPE, be sure to initialize the port for its intended I/O use.
$000A
Reset:
Read:
Write:
This read/write bit enables the SIOP. Setting SPE initializes the data
direction register as follows:
Clearing SPE disables the SIOP and returns the port to its normal I/O
functions. The data direction register and the port data register remain
in their SIOP-initialized state.
Freescale Semiconductor, Inc.
For More Information On This Product,
SIOP control register (SCR)
SIOP status register (SSR)
SIOP data register (SDR)
The PB6/SDI pin is an input.
The PB5/SDO pin is an output.
The PB7/SCK pin is an input in slave mode and an output in
master mode.
Bit 7
0
0
Go to: www.freescale.com
Figure 64. SIOP Control Register (SCR)
= Unimplemented
SPE
6
0
SIOP
5
0
0
MSTR
4
0
3
0
0
2
0
0
1
0
0
14-mc68hc05p9a
MOTOROLA
Bit 0
0
0

Related parts for mc68hc05p9a