mc68hc11d0 Freescale Semiconductor, Inc, mc68hc11d0 Datasheet - Page 98

• Manufacturer Part Number: mc68hc11d0
• Description: Mc68hc11d0 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

PR[1:0] — Timer Prescaler Select
9.3.10 Timer Interrupt Flag 2 Register
TOF — Timer Overflow Interrupt Flag
RTIF — Real-Time (Periodic) Interrupt Flag
PAOVF — Pulse Accumulator Overflow Interrupt Flag
PAIF — Pulse Accumulator Input Edge Interrupt Flag
Bits [3:0]— Not implemented
9.4 Real-Time Interrupt
9-12
TFLG2 — Timer Interrupt Flag 2
RESET:
These bits are used to select the prescaler divide-by ratio. In normal modes, PR[1:0]
can only be written once, and the write must be within 64 cycles after reset. Refer to
Table 9-1 for specific timing values.
Bits in this register indicate when certain timer system events have occurred. Coupled
with the four high-order bits of TMSK2, the bits of TFLG2 allow the timer subsystem to
operate in either a polled or interrupt driven system. Each bit of TFLG2 corresponds
to a bit in TMSK2 in the same position.
Clear flags by writing a one to the corresponding bit position(s).
Set when TCNT changes from $FFFF to $0000
Refer to 9.4 Real-Time Interrupt.
Refer to 9.6 Pulse Accumulator.
Refer to 9.6 Pulse Accumulator.
Always read zero
The real-time interrupt feature, used to generate hardware interrupts at a fixed periodic
rate, is controlled and configured by two bits (RTR1 and RTR0) in the pulse accumu-
lator control (PACTL) register. The RTII bit in the TMSK2 register enables the interrupt
capability. The four different rates available are a product of the MCU oscillator fre-
quency and the value of bits RTR[1:0]. Refer to the following table, which shows the
periodic real-time interrupt rates.
Bit 7
TOF
0
RTIF
Freescale Semiconductor, Inc.
6
0
For More Information On This Product,
PAOVF
PR[1:0]
Go to: www.freescale.com
5
0
0 0
0 1
1 0
1 1
TIMING SYSTEM
PAIF
4
0
Prescaler
16
1
4
8
3
0
0
2
0
0
TECHNICAL DATA
1
0
0
$0025
Bit 0
0
0