mpc860srzp50 Freescale Semiconductor, Inc, mpc860srzp50 Datasheet - Page 11

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mpc860srzp50

Manufacturer Part Number
mpc860srzp50
Description
Mpc860sar Powerquicc Features
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Support for expanded cells (up to 64 bytes) is also provided. While the standard size of cells on the ATM
network is 53 bytes, support for larger cells enables the user to tag additional information onto a cell. An
example use of this tag information is insertion of a card address when implementing ATM over a shared
backplane in an ATM switch.
1.4.1
The standard MPC860 can handle one logical channel performing the protocol framework for each of its
serial channels. This logical channel can be used in time-division-multiplexed interfaces. In contrast, the
QMC microcode emulates up to 64 serial controllers that can operate in either HDLC mode or transparent
mode within one single SCC.
See the documentation for the MPC860MH for more details on the features and operation of the QMC
microcode.
1.5
The following list summarizes the major software differences between the MC68360 QUICC and the
MPC860 PowerQUICC family:
1.6
A fundamental design goal of the MPC860 PowerQUICC family is the ease of interface to other system
components. Figure 2 shows a system configuration that offers one EPROM, one Flash EPROM, and
MOTOROLA
Since the MPC860 PowerQUICC family uses an embedded MPC860SAR core, code written for
the MC68360 must be recompiled for the PowerPC instruction set. Code that accesses the
MC68360 peripherals requires only minor modifications for use with the MPC860. Although the
functions performed by the PowerQUICC SIU are similar to those performed by the QUICC SIM,
the initialization sequence for the SIU is different and, therefore, code that accesses the SIU must
be rewritten. Many developers of 68K compilers now provide compilers which also support the
PowerPC architecture.
When porting code from the MC68360 CPM to the MPC860 CPM, the software writer will find
new options for hardware breakpoint on CPU commands, address, and serial request that are useful
for software debugging. Support for single-step operation with all the registers of the CPM visible
makes software development for the CPM on the MPC860 processor even simpler.
Software Compatibility Issues
PowerQUICC Glueless System Design
QMC Microcode
MPC860SAR PowerQUICC™ Technical Summary
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