mpc5534mzq66 Freescale Semiconductor, Inc, mpc5534mzq66 Datasheet - Page 11

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mpc5534mzq66

Manufacturer Part Number
mpc5534mzq66
Description
Mpc5534 High Performance Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Although there is no power sequencing required between VRC33 and VDDSYN during power up, for the
VRC stage turn-on to operate within specification, VRC33 must not lead VDDSYN by more than 600 mV
or lag by more than 100 mV. Higher spikes in the emitter current of the pass transistor will occur if VRC33
leads or lags VDDSYN by more than these amounts. The value of that higher spike in current depends on
the board power supply circuitry and the amount of board level capacitance.
Furthermore, when all of the PORs negate, the system clock will start to toggle, adding another large
increase of the current consumption from VRC33. If VRC33 lags VDDSYN by more than 100 mV, this
increased current consumption can drop VDD low enough to assert the 1.5-V POR again. Oscillations are
even possible because when the 1.5-V POR asserts, the system clock stops, causing the voltage on VDD
to rise until the 1.5-V POR negates again. Any oscillations stop when VRC33 is powered sufficiently.
When powering down, VRC33 and VDDSYN do not have a delta requirement to each other, because the
bypass capacitors internal and external to the device are already charged.
When not powering up or down, VRC33 and VDDSYN do not have a delta requirement to each other for
the VRC to operate within specification.
Although there are no power up/down sequencing requirements to prevent issues like latch-up, excessive
current spikes, etc., the state of the I/O pins during power up/down varies depending on power.
gives the pin state for the sequence cases for all pins with pad type pad_fc (fast type), and
pins with pad type pad_mh (medium type) and pad_sh (slow type).
3.7.1
In this case, the 1.5-V VDD supply must rise to 1.35-V before the 3.3-V VDDSYN and the RESET power
supplies rises above 2.0 V. This ensures that digital logic in the PLL on the 1.5-V supply will not begin to
operate below the specified operation range lower limit of 1.35 V. Since the internal 1.5-V POR is disabled,
Freescale Semiconductor
VDDEH
VDDEH
V
VDDE
VDDE
VDDE
V
LOW
LOW
DDEH
DDE
Power Up Sequence (If VRC33 Grounded)
VDD33
VDD33
V
LOW
DD33
LOW
VDD
V
X
X
DD
Table 8. Power Sequence Pin States (Medium and Slow Pads)
LOW
VDD
V
X
X
DD
(Medium and Slow)
pad_mh/pad_sh
Table 7. Power Sequence Pin States (Fast Pads)
High Impedance
Output Driver
Preliminary—Subject to Change Without Notice
Functional
MPC5534 Microcontroller Data Sheet, Rev. 0
Low
High Impedance
Output Driver
pad_fc (Fast)
Functional
State
High
Low
Functional I/O pins are clamped to VSS and VDDEH
POR asserted
No POR asserted
Functional I/O pins are clamped to VSS and VDDE
POR asserted.
No POR asserted
Comment
Comment
Electrical Characteristics
Table 8
Table 7
for all
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