spc560p50l3 STMicroelectronics, spc560p50l3 Datasheet - Page 15

• Manufacturer Part Number: spc560p50l3
• Description: 32-bit Power Architecture? Based Mcu For Chassis & Safety Applications
• Manufacturer: STMicroelectronics

SPC560P44Lx, SPC560P50Lx
3.2.9
3.2.10
3.2.11
3.2.12
The PLL has the following major features:
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Main oscillator
The main oscillator provides these features:
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Internal RC oscillator
This device has an RC ladder phase-shift oscillator. The architecture uses constant current
charging of a capacitor. The voltage at the capacitor is compared by the stable bandgap
reference voltage.
The RC Oscillator provides these features:
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Periodic Interrupt Timer Module (PIT)
The PIT module implements these features:
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System Timer Module (STM)
The STM module implements these features:
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Input clock frequency from 4 MHz to 40 MHz
Voltage Controlled Oscillator (VCO) range from 256 MHz to 512 MHz
Reduced Frequency Divider (RFD) for reduced frequency operation without forcing the
PLL to relock
Frequency modulated PLL
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Programmable modulation depth (±0.25 % to ±4 % deviation from center frequency)
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Self-cLocked Mode (SCM) operation
Input frequency range: 4-40 MHz
Crystal input mode or oscillator input mode
PLL reference
Nominal frequency 16MHz
+/-5 % variation over voltage and temperature after process trim
Clock output of the RC oscillator serves as system clock source in case loss of lock or
loss of clock is detected by the PLL
RC oscillator is used as the default system clock during startup
Up to four general purpose interrupt timers
32-bit counter resolution
Clocked by system clock frequency
Each channel can be used as trigger for a DMA request
One 32-bit up counter with 8-bit prescaler
Four 32-bit compare channels
Independent interrupt source for each channel
Counter can be stopped in debug mode
Modulation enabled/disabled through software
Triangle wave modulation
Programmable modulation frequency dependent on reference frequency
Doc ID 13950 Rev 5
Overview of the SPC560Px
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