mpc2107 Freescale Semiconductor, Inc, mpc2107 Datasheet - Page 19

• Manufacturer Part Number: mpc2107
• Description: 256kb And 512kb Burstramtm Secondary Cache Mod
• Manufacturer: Freescale Semiconductor, Inc

TAG RAM MATCH CYCLE
TAG RAM RESET (TCLR) CYCLE
MOTOROLA FAST SRAM
Clock High Write to MATCH Invalid
Clock High Read to MATCH Valid
Address Valid to MATCH Valid
MATCH Valid Hold from Address Change
TOE Low to MATCH Invalid
TOE High to MATCH Valid
TCLR Set–up Time
TCLR Hold Time
Status Bit Reset Time
Status Bit Hold from TCLR Low
TCLR Low to MATCH Invalid
TCLR High to MATCH Valid
TCLR Low to TAG High–Z
TCLR High to TAG Active
STANDBY Set–up to TCLR Low
TCLR High to TWE Low
OUTPUT
Z 0 = 50 Ω
Figure 1A
AC TEST LOADS
V L = 1.5 V
Parameter
Parameter
50 Ω
OUTPUT
255 Ω
Figure 1B
+5 V
480 Ω
5 pF
Symbol
Symbol
t RHWX
t KHMV
t GHMX
t RSMV
t KHML
t AVMV
t AXMX
t SHRS
t RSML
t RSQZ
t RSQX
t PDSR
t GLML
t SRST
t STC
t HTC
MPC2104 MPC2105 MPC2106 MPC2107
Min
Min
30
80
—
—
—
—
—
—
—
—
—
—
2
4
1
2
minimum or a maximum limit for each param-
eter. Input requirements are specified from
the external system point of view. Thus, ad-
dress setup time is shown as a minimum
since the system must supply at least that
much time (even though most devices do not
require it). On the other hand, responses from
the memory are specified from the device
point of view. Thus, the access time is shown
as a maximum since the device never pro-
vides data later than that time.
Tag RAM
Tag RAM
The table of timing values shows either a
Max
Max
100
100
10
10
60
10
10
—
—
—
—
—
—
7
7
8
TIMING LIMITS
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
19