ns32491a National Semiconductor Corporation, ns32491a Datasheet - Page 2

• Manufacturer Part Number: ns32491a
• Description: Sni Serial Network Interface
• Manufacturer: National Semiconductor Corporation

2 0 Block Diagram
3 0 Functional Description
The SNI consists of five main logical blocks
a) the oscillator generates the 10 MHz transmit clock sig-
b) the Manchester encoder and differential output driver
c) the Manchester decoder receives Manchester data
d) the collision translator indicates to the controller the
e) the loopback circuitry when asserted switches encod-
3 1 OSCILLATOR
The oscillator is controlled by a 20 MHz parallel resonant
crystal connected between X1 and X2 or by an external
clock on X1 The 20 MHz output of the oscillator is divided
by 2 to generate the 10 MHz transmit clock for the control-
ler The oscillator also provides internal clock signals to the
encoding and decoding circuits
Resonant frequency
Tolerance
Stability
Type
Circuit
The 20 MHz crystal connection to the SNI requires special
care The IEEE 802 3 standard requires a 0 01% absolute
accuracy on the transmitted signal frequency Stray capaci-
tance can shift the crystal’s frequency out of range causing
nal for system timing
accepts NRZ data from the controller performs Man-
chester encoding and transmits it differentially to the
transceiver
from the transceiver converts it to NRZ data and clock
pulses and sends them to the controller
presence of a valid 10 MHz signal at its input
ed data instead of receive input signals to the digital
phase-locked loop
Crystal Specification
Parallel Resonance
g
g
0 005% 0 – 70 C
0 001% at 25 C
20 MHz
AT-Cut
FIGURE 1
2
the transmitted frequency to exceed its 0 01% tolerance
The frequency marked on the crystal is usually measured
with a fixed shunt capacitance (C
crystal’s data sheet This capacitance for 20 MHz crystals is
typically 20 pF The capacitance between the X1 and X2
pins of the SNI of the PC board traces and the plated
through holes plus any stray capacitance such as the sock-
et capacitance if one is used should be estimated or mea-
sured Once the total sum of these capacitances is deter-
mined the value of additional external shunt capacitance
required can be calculated This capacitor can be a fixed
5% tolerance component The frequency accuracy should
be measured during the design phase at the transmit clock
pin (TXC) for a given pc layout Figure 2 shows the crystal
connection
Note 1 When using a Viking (San Jose) VXB49N5 crystal the external ca-
3 2 MANCHESTER ENCODER AND DIFFERENTIAL
DRIVER
The encoder combines clock and data information for the
transceiver Data encoding and transmission begins with the
transmit enable input (TXE) going high As long as TXE re-
CP
CL
e
e
a) SNI input capacitance between X1 and X2 (typically 5 pF)
b) PC board traces plated through holes socket capacitances
pacitor is not required as the C
capacitance of the DP8391A
Load capacitance specified by the crystal’s manufacturer
Total parasitic capacitance including
FIGURE 2 Crystal Connection
L
of the crystal matches the input
L
) that is specified in the
TL F 9357 – 2
TL F 9357 – 3