km68512a Samsung Semiconductor, Inc., km68512a Datasheet - Page 5

• Manufacturer Part Number: km68512a
• Description: 64kx8 Bit Low Power Cmos Static Ram
• Manufacturer: Samsung Semiconductor, Inc.

AC CHARACTERISTICS
DATA RETENTION CHARACTERISTICS
1. CS
AC OPERATING CONDITIONS
TEST CONDITIONS
KM68512A Family
Read
Write
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Input pulse level : 0.8 to 2.4V
Input rising and falling time : 5ns
Input and output reference voltage :1.5V
Output load(see right) : C
1
Vcc-0.2V, CS
Item
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
2
Vcc-0.2V( CS
( Test Load and Input/Output Reference)
Parameter List
L
=100pF+1TTL
V
I
t
t
DR
SDR
RDR
DR
1
controlled) or CS
(Vcc=4.5~5.5V, KM68512A Family:T
KM68512AL/L-L
KM68512ALI/LI-L
Symbol
2
0.2V(CS
CS
Vcc=3.0V CS
CS
See data retention waveform
2
controlled).
1
2
1)
Vcc-0.2V or CS
Vcc-0.2V
t
Test Condition
Symbol
CO1
5
t
t
t
1
t
t
t
t
t
t
t
t
t
t
t
OHZ
t
t
WHZ
t
t
OLZ
OW
WC
CW
AW
WP
WR
DW
RC
AA
OE
HZ
OH
AS
DH
, t
LZ
A
Vcc-0.2V
=0 to 70 C, KM68512AI Family:T
CO2
2
0.2V
1. Including scope and jig capacitance
Min
55
10
10
55
45
45
40
25
C
5
0
0
0
0
0
0
5
-
-
-
L
L-Ver
LL-Ver
L-Ver
LL-Ver
1)
55ns
Max
55
55
25
20
20
20
Speed Bins
-
-
-
-
-
-
-
-
-
-
-
-
-
Min
2.0
0
5
-
-
-
-
Min
70
10
10
70
60
60
50
30
CMOS SRAM
5
0
0
0
0
0
0
5
-
-
-
A
Typ
=-40 to 85 C)
0.5
70ns
1
-
-
-
-
-
Max
70
70
35
25
25
25
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
5.5
January 1997
50
10
50
25
-
-
Revision 4.0
Units
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
V
A