pal22v10-7 Advanced Micro Devices, pal22v10-7 Datasheet - Page 20

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pal22v10-7

Manufacturer Part Number
pal22v10-7
Description
Pal22v10 Family, Ampal22v10/a 24-pin Ttl Versatile Pal Device
Manufacturer
Advanced Micro Devices
Datasheet

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POWER-UP RESET
The power-up reset feature ensures that all flip-flops will
be reset to LOW after the device has been powered up.
The output state will depend on the programmed pat-
tern. This feature is valuable in simplifying state ma-
chine initialization. A timing diagram and parameter ta-
ble are shown below. Due to the synchronous operation
of the power-up reset and the wide range of ways V
2-216
Parameter
Symbol
t
t
t
Active-Low
Registered
PR
S
WL
AMD
Output
Power
Clock
Parameter Description
Power-up Reset Time
Input or Feedback Setup Time
Clock Width LOW
4 V
Power-Up Reset Waveform
PAL22V10 Family
t
PR
CC
can rise to its steady state, two conditions are required
to ensure a valid power-up reset. These conditions are:
The V
Following reset, the clock input must not be driven
from LOW to HIGH until all applicable input and feed-
back setup times are met.
t
WL
t
S
CC
rise must be monotonic.
1000
Max
Characteristics
See Switching
V
CC
Unit
ns
16559C-18

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