pal22v10-7 Advanced Micro Devices, pal22v10-7 Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/0/14/advanced_micro_devices_sml.jpg)
pal22v10-7
Manufacturer Part Number
pal22v10-7
Description
Pal22v10 Family, Ampal22v10/a 24-pin Ttl Versatile Pal Device
Manufacturer
Advanced Micro Devices
Datasheet
1.PAL22V10-7.pdf
(20 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
pal22v10-7PC
Manufacturer:
TOSHIBA
Quantity:
6 218
FUNCTIONAL DESCRIPTION
The PAL22V10 allows the systems engineer to imple-
ment a design on-chip, by opening fuse links to config-
ure AND and OR gates within the device, according to
the desired logic function. Complex interconnections
between gates, which previously required time-
consuming layout, are lifted from the PC board and
placed on silicon, where they can be easily modified dur-
ing prototyping or production.
Product terms with all fuses opened assume the logical
HIGH state; product terms connected to both true and
complement of any single input assume the logical LOW
state.
The PAL22V10 has 12 inputs and 10 I/O macrocells.
The macrocell (Figure 1) allows one of four potential out-
put configurations; registered output or combinatorial
I/O, active high or active low (see Figure 2). The configu-
ration choice is made according to the user’s design
2-200
AMD
CLK
D Q
AR
SP
0
1
Q
Figure 1. Output Logic Macrocell Diagram
S
1
1 0
1 1
0 0
0 1
S
0
PAL22V10 Family
specification and corresponding programming of the
configuration bits S
are connected to ground (0) through a programmable
fuse, selecting the “0” path through the multiplexer. Pro-
gramming the fuse disconnects the control line from
GND and it is driven to a high level, selecting the “1”
path.
The device is produced with a fuse link at each input to
the AND gate array, and connections may be selectively
removed by applying appropriate voltages to the circuit.
Variable Input/Output Pin Ratio
The PAL22V10 has twelve dedicated input lines, and
each macrocell output can be an I/O pin. Buffers for de-
vice inputs have complementary outputs to provide
user-programmable input signal polarity. Unused input
pins should be tied to V
0 = Unprogrammed fuse
1 = Programmed fuse
I/O
n
S
0
0
1
1
1
S
0
1
0
1
0
0
– S
CC
1
. Multiplexer controls initially
Registered/Active Low
Registered/Active High
Combinatorial/Active Low
Combinatorial/Active High
or GND.
Output Configuration
16559C-4