lm4549b National Semiconductor Corporation, lm4549b Datasheet
lm4549b
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lm4549b Summary of contents
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... AC ’97 Rev 2.1 Multi-Channel Audio Codec with Sample Rate Conversion and National 3D Sound General Description The LM4549B is an audio codec for PC systems which is fully PC99 compliant and performs the analog intensive functions of the AC ’97 Rev 2.1 architecture. Using 18-bit Sigma-Delta ADCs and DACs, the LM4549B provides Dynamic Range ...
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... CD Left to Right All Analog Inputs CD Left to Right 22 -34 ≤ T −40˚C ≤ T (Note 4) A MAX 4.2V ≤ 3.0V ≤ 5V 3.3V 25˚C. The reference for LM4549B Typical Limit (Note 6) (Note 7) 4.2 5.5 3 kΩ 0.013 0. ...
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... Variation of BIT_CLK duty cycle from 50% SDATA_OUT to falling edge of BIT_CLK Hold time of SDATA_OUT from falling edge of BIT_CLK SYNC to falling edge of BIT_CLK 3.3V 25˚C. The reference for Units LM4549B (Limits) Typical Limit (Note 6) (Note 7) 18 Bits (min) 20 kHz 18 Bits ...
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... For Warm Reset Delay from end of Slot 2 to BIT_CLK, SDATA_IN low Time from minimum valid supply levels to end of Reset For ATE Test Mode For ATE Test Mode )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4549B 5V 3.3V 25˚ ...
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Timing Diagrams Clocks Digital Rise and Fall www.national.com Data Delay, Setup and Hold 20123510 20123512 Power On Reset Cold Reset Warm Reset 6 20123511 Legend 20123530 20123529 20123513 20123514 ...
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... FIGURE 1. LM4549B Typical Application Circuit, Single Codec, 1 Vrms inputs APPLICATION HINTS • The LM4549B must be initialized by using RESET# to perform a Power On Reset as shown in the Power On Reset Timing Diagram • Don’t leave unused Analog inputs floating. Tie all unused inputs together and connect to Analog Ground through a capacitor (e.g. 0.1 µ ...
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... The PHONE level can be muted or adjusted from + -34 1.5 dB steps. The Stereo Mix signal feeds both the Line Out and Line Level Out analog stereo outputs and is also selectable at the Record Select Mux. Top View Order Number LM4549BVH See NS Package Number VBH48A ANALOG I/O 9 20123502 www ...
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Pin Descriptions (Continued) Name Pin Functional Description Left Stereo Channel Input This line level input (1 Vrms nominal) is selectable at the left channel of the stereo Record Select Mux for conversion by the left channel ADC. ...
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Pin Descriptions (Continued) Name Pin Functional Description Mono microphone input Either MIC1 or MIC2 can be muxed to a programmable boost amplifier with selection by the MS bit (bit D8) in the General Purpose register, 20h. The ...
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... This pin is an INPUT when the codec is configured in any of the Secondary Codec modes and would normally use the AC Link clock generated by a Primary Codec. Output from codec This is the output for AC Link Input Frames from the LM4549B codec ’97 Digital SDATA_IN 8 O Audio Controller ...
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... Pin Cold Reset This active low signal causes a hardware reset which returns the control registers and all internal circuits to their default conditions. RESET# MUST be used to initialize the LM4549B RESET after Power On when the supplies have stabilized. Cold Reset also clears the codec from both ATE and Vendor test modes ...
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Pin Descriptions (Continued) Name Pin 29, 30 31, 32 These pins are not used and should be left open (NC For second source applications these pins may be connected to a noise-free supply ...
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Volume Output Volume Input Sources ADC 15 www.national.com ...
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... Functional Description GENERAL The LM4549B codec can mix, process and convert among analog (stereo and mono) and digital (AC Link format) inputs and outputs. There are four stereo and four mono analog inputs and two stereo and one mono analog outputs. A single codec supports data streaming on two input and two output channels of the AC Link digital interface simultaneously ...
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... If a new Frame is detected (a low-to-high transition on SYNC) before 256 bits are received from the old Frame then the new Frame is ignored i.e. the data on SDATA_OUT is discarded until a valid new Frame is detected. The LM4549B expects to receive data MSB first MSB justified format. 17 20123504 20123506 www ...
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... Slots. With the codec in Primary mode, a controller will indicate valid data in a slot by setting the associated tag bit equal to 1. Since two channel codec the LM4549B can only receive data from four slots in a given frame and so only checks the valid-data bits for 4 slots. In Primary mode these ...
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... Frames are constructed from thirteen time slots: one Tag Slot followed by twelve Data Slots. The Tag Slot, Slot 0, contains 16 bits of which 5 are used by the LM4549B. One is used to indicate that the AC Link interface is fully operational and the other 4 to indicate the validity of the data in the four of the twelve following Data Slots that are used by the LM4549B ...
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... Hz, then only those one-in-six audio samples that follow a Slot Request will be used by the DAC. The rest will be discarded. Bits 9 – 2 are request bits for slots not used by the LM4549B and are stuffed with zeros. Bits 1 and 0 are reserved and are also stuffed with zeros. ...
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... PCM sample from right 19:2 Right Channel ADC data 1:0 Reserved Stuffed with "0"s by LM4549B SDATA_IN: Slots – Reserved Slots 5 – the AC Link Input Frame are not used for data by the LM4549B and are always stuffed with zeros. 21 Comment www.national.com ...
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... RESET REGISTER (00h) Writing any value to this register causes a Register Reset which changes all registers back to their default values read is performed on this register, the LM4549B will return a value of 0D40h. This value can be interpreted in accordance with the AC ’97 Specification to indicate that National 3D Sound is implemented and 18-bit data is supported for both the ADCs and DACs ...
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... Default: 000Fh If ready; otherwise 000Xh EXTENDED AUDIO ID REGISTER (28h) This read-only (X001h) register identifies which AC ’97 Ex- tended Audio features are supported. The LM4549B features VRA (Variable Rate Audio) and ID1, ID0 (Multiple Codec 23 BIT Function: Status 1 = ADC section ready to ADC ...
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... LM4549B Register Map are reserved. Reserved regis- ters will return 0000h if read. Codec Identity Mode Low Power Modes 0 Primary The LM4549B provides 6 bits to control the powerdown state 1 Secondary 1 of internal analog and digital subsections and clocks. It also 0 Secondary 2 provides one bit intended to control an external analog ...
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... LM4549A. The LM4549A requires that pins 1 and 9 (DV ) connect directly nH. inductor before going to DD the 3.3 Volt digital supply and the bypass capacitors. The inductor is not required for the LM4549B and should not be used. Multiple Codecs EXTENDED AC LINK Up to four codecs can be supported on the extended AC Link ...
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Multiple Codecs (Continued) configured as ’Primary’ either by leaving ID1#, ID0# open (NC strapping them externally to DV ply). The difference between Primary and Secondary codec modes is in their timing source and in the Tag Bit handling ...
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Multiple Codecs (Continued) FIGURE 9. Multiple Codecs using Extended AC Link Test Modes AC ’97 Rev 2.1 defines two test modes: ATE test mode and Vendor test mode. Cold Reset is the only way to exit either of them. The ...
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... English www.national.com Français Tel: +33 ( 8790 48-Lead , LQFP 1.4mm, JEDEC (M) Order Number LM4549BVH NS Package Number VBH48A 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness ...