adav804 Analog Devices, Inc., adav804 Datasheet - Page 23

• Manufacturer Part Number: adav804
• Description: Audio Codec For Recordable Dvd
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
have changed from a previous block. The function of the
RxCSBINT is controlled by the RxBCONF3 bit in the Receiver
Buffer Configuration Register.
The size of the User bit buffer can be set using by programming
the RxBCONF0 bit in the Receiver Buffer Configuration
register as shown in Table 20.
Table 20. RxBCONF3 Functionality
RxBCONF0
0
1
The updating of the User bit buffer is controlled by bits
RxBCONF2-1 and bits 7 to 4 of the Channel Status as shown in
Table 21 and Table 22.
Table 21. RxBCONF2-1 Functionality
RxBCONF
Bit 2
0
0
1
Table 22. Automatic User Bit Configuration
Bits
7
0
0
1
1
When the User bit buffer has been filled, the RxUBINT
interrupt bit in the Interrupt Status register will be set, provided
that the RxUBINT Mask bit is set, to indicate that the buffer has
new information and can be read.
For the special case when the user data is formatted according
to the IEC60958-3 standard into messages made of of
information units, called IUs, the zeros stuffed between each IU
and each message are removed and only the IUs are stored.
Once the end of the message is sensed, by more that 8 zeros
between IUs, the User bit buffer is updated with the complete
message and the first buffer begins looking for the start of the
next message. Each IU is stored as a byte consisting of 1, Q, R, S,
T, U, V and W bits (see the IEC60958-3 specification for more
information). For the case where 96IUs are received, the Q
subcode of the IUs is stored in the Q subcode buffer consisting
of 10 bytes. The Q subcode is the Q bits taken from each of the
6
0
1
0
1
5
0
0
0
0
Bit
1
0
1
0
4
0
0
0
0
Receiver User Bit Buffer Configuration
User bits are ignored
Update second buffer when first buffer is full
Format according to byte 1, bits 4-7 if PRO bit is
set. Format according to IEC60958-3 if PRO bit is
clear
Receiver User Bit Buffer Size
384 bits with Preamble Z as the start of the block
768 bits with Preamble Z as the start of the block
Automatic Receiver User Bit Buffer
Configuration
User Bits are ignored
AES-18 format, the User bit buffer is treated in
the same way as when RxBCONF2-1 = 0b01
User bit buffer is updated in the same way as
when RxBCONF2-1 = 0b01 and RxBCONF0 =
0b00
User defined format, the User bit buffer is
treated in the same way as when RxBCONF2-1 =
0b01
Rev. Pr G | Page 23 of 54
96 IUs. The first 10 bytes, 80 bits, of the Q subcode contain
information sent by CD, MD and DAT systems. The last 16 bits
of the Q subcode are used to perform a CRC check of the Q
subcode. If an error occurs in the CRC check of the Q subcode,
the QCRCERROR bit will be set. This is a sticky bit and will
remain high until the register is read.
Transmitter Operation
The SPDIF transmitter has a similar buffer structure to the
receive section. The transmitter Channel Status buffer occupies
24 bytes of the register map. This buffer is long enough to store
the 192 bits required for one channel of Channel Status
information. Setting the TxCSSWITCH bit determines if the
data loaded to the Transmitter Channel Status buffer is intended
for channel A or channel B. In most cases the channel status bits
for channel A and channel B are the same in which case setting
the Tx_A/B_Same bit will read the data from the Transmitter
Channel Status buffer and transmit it on both channels. Since
the Channel Status information is rarely changed during
transmission the information contained in the buffer is
transmitted repeatedly. The Disable_Tx_Copy bit can be used to
prevent the Channel Status bits from being copied from the
Transmitter CS Buffer into the SPDIF Transmitter buffer until
the user has finished loading the buffers. This feature is typically
used if the channel A and channel B data is different. Setting the
bit will prevent the data being copied and clearing the bit will
allow the data to be copied and then transmitted. Figure 31
shows how the buffers are organized.
As with the receiver section the transmitted User bits are also
double buffered. This is required since, unlike the Channel
Status bits, the User bits do not necessarily repeat themselves.
The User bits can be buffered in various configuration as Table
23. Transmission of the user bits is determined by the state of
the BCONF3 bit. If the bit is 0 the user bits will begin
transmitting straight away without alignment to the Z preamble.
If this bit is 1 the User bits will not start transmitting until a Z
preamble occurs when the TxBCONF2-1 bits are 01.
TxCSSWITCH
CS BUFFER
(0x38-0x4F)
TRANSMIT
Figure 31. Transmitter Channel Status Buffer
(24 X 8 BITS)
(24 X 8 BITS)
CHANNEL
STATUS A
CHANNEL
STATUS B
TRANSMIT
DITOUT
BUFFER
SPDIF
ADAV804