isp1102a NXP Semiconductors, isp1102a Datasheet

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isp1102a

Manufacturer Part Number
isp1102a
Description
Isp1102a Advanced Universal Serial Bus Transceiver
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features
The ISP1102A Universal Serial Bus (USB) transceiver is fully compliant with
“Universal Serial Bus Specification Rev.
USB data at full-speed (12 Mbit/s).
The transceiver allows USB Application-Specific Integrated Circuits (ASICs) and
Programmable Logic Devices (PLDs) with power supply voltages from 1.65 V to 3.6 V to
interface with the physical layer of the USB. The transceiver has an integrated 5 V-to-3.3 V
voltage regulator for direct powering through USB supply line V
an integrated voltage detector to detect the presence of the V
V
protocols.
The transceiver is a bidirectional differential interface and is available in HBCC16
package.
The transceiver is ideal for use in portable electronic devices, such as mobile phones,
digital still cameras, Personal Digital Assistants (PDAs) and Information Appliances (IAs).
I
I
I
I
I
I
I
I
I
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I
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CC(5V0)
ISP1102A
Advanced Universal Serial Bus transceiver
Rev. 01 — 15 February 2007
Complies with
Supports data transfer at full-speed (12 Mbit/s)
Integrated 5 V-to-3.3 V voltage regulator to power through USB line V
V
VP and VM pins function in bidirectional mode, allowing pin count saving for the ASIC
interface
Used as USB device transceiver or USB host transceiver
Stable RCV output during Single-Ended Zero (SE0) condition
Two single-ended receivers with hysteresis
Low-power operation
Supports I/O voltage range from 1.65 V to 3.6 V
pins
Full industrial operating temperature range from 40 C to +85 C
Available in HBCC16 lead-free and halogen-free package
12 kV ElectroStatic Discharge (ESD) protection at the DP, DM, V
BUS
or VREG3V3 is lost, the DP and DM pins can be shared with other serial
voltage presence indication on pin VBUSDET
Ref. 1 “Universal Serial Bus Specification Rev. 2.0”
2.0”. The ISP1102A can transmit and receive
BUS
BUS
voltage (V
. The transceiver has
Product data sheet
CC(5V0)
BUS
CC(5V0)
and GND
Ref. 1
). When

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isp1102a Summary of contents

Page 1

... Advanced Universal Serial Bus transceiver Rev. 01 — 15 February 2007 1. General description The ISP1102A Universal Serial Bus (USB) transceiver is fully compliant with “Universal Serial Bus Specification Rev. USB data at full-speed (12 Mbit/s). The transceiver allows USB Application-Specific Integrated Circuits (ASICs) and Programmable Logic Devices (PLDs) with power supply voltages from 1 ...

Page 2

... Block diagram Fig 1. Block diagram ISP1102A_1 Product data sheet 3 CC(IO) VBUSDET SOFTCON OE_N LEVEL SHIFTER RCV ISP1102A VP/VPO VM/VMO SUSPEND Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver 3 0.65 mm SOT639-2 VOLTAGE V CC(5V0) REGULATOR VREG3V3 VPU3V3 GND 004aaa843 © NXP B.V. 2007. All rights reserved. ...

Page 3

... CMOS suspend input (CMOS level with respect to V low-power state while the USB bus is inactive and drives output RCV to a LOW level input pad; push pull; CMOS not connected Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver 13 VREG3V3 12 n. ...

Page 4

... VPU3V3, which is connected to an external 1.5 k pull-up resistor; this allows USB connect or disconnect signaling to be controlled by software input pad; push pull; CMOS ground supply; down bonded to the exposed die pad (heat sink connected to the PCB ground Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver is not connected, CC(IO) ) CC(IO ...

Page 5

... RCV* denotes the signal level on output RCV just before the SE0 state occurs. This level is stable during the SE0 period. 7.3 Power supply configurations The ISP1102A can be used with various power supply configurations, which can be changed dynamically. Normal mode — V VREG3V3 are connected ...

Page 6

... Sharing mode — this mode, the DP and DM pins are 3-stated and the ISP1102A allows external signals 3 share the DP and DM lines. The internal circuits of the ISP1102A ensure that virtually no current (maximum drawn through the DP and DM lines. The power consumption through pin V Pins VBUSDET and RCV are driven to LOW to indicate this mode ...

Page 7

... NXP Semiconductors 7.4 Power supply input options The ISP1102A has two power supply input options. Internal regulator — Pin V used to supply the internal circuitry with 3.3 V (nominal). The VREG3V3 pin becomes a 3.3 V output reference. Regulator bypass — Pins V The internal regulator is bypassed and the internal circuitry is supplied directly from pin VREG3V3. The voltage range comply with Bus Specifi ...

Page 8

... GND) have a minimum ESD protection. The 12 kV measurement to GND are required to achieve this 12 kV ESD protection (see charge current limit resistor resistance storage C S capacitor 100 pF Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver R D 1500 discharge DEVICE UNDER A B 4.7 F Figure 3). TEST ...

Page 9

... Mbit/ pins DP L and DM transmitting and receiving at CC(IO) 12 Mbit/s idle: V > 2 < 0 SE0: V < 0 < 0 idle, SE0 or suspend SUSPEND = HIGH Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver Min Max 0.5 +6.0 0.5 +4.6 0.5 V CC(IO) - 100 [1][2] 12000 +12000 [2] 2000 +2000 40 ...

Page 10

... Rev. 01 — 15 February 2007 Advanced USB transceiver = 0 V; see Table 8 GND Min Typ - - - - - - - - 4 1 0. [5] 2 0.45 Min Typ - - 0.6V - CC(IO 0. CC(IO CC(IO) ISP1102A for valid voltage Max Unit Max Unit 0.3V V CC(IO 0. © NXP B.V. 2007. All rights reserved ...

Page 11

... 1. 100 100 A 2. 1 100 100 A 2. 2.6 OH [1] 5 Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver Typ Max Unit - ...

Page 12

... see Figure 125 pF see Figure excluding the first transition from Idle state Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver = +85 C; unless otherwise specified. Min Typ Max 0 0 0.8 2 ...

Page 13

... DP RCV; see Figure 7 and Figure 10 DP VP/VPO, VM/VMO; see Figure 7 and Figure 10 DP VP/VPO, VM/VMO; see Figure 7 and Figure 10 Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver = 0 V; see Table 8 for valid voltage GND Min Typ Max [1] 1 ...

Page 14

... Fig 5. Timing of VPO and VMO to DP and DM differential data lines 0 PHZ t PLZ V 0 logic output 004aaa574 Fig 7. Timing of DP and DM to RCV, VP/VPO and Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver 0 PLH(drv) differential V CRS data lines 2 CRS 0 PLH(rcv) t PLH(se ...

Page 15

... L D.U. for t and t PZH PHZ for t and t (VREG3V3) PZL PLZ D.U.T. Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver 1.5 k test point 004aaa037 test point 33 500 004aaa517 test point 25 pF 004aaa709 © NXP B.V. 2007. All rights reserved. ...

Page 16

... 2.5 scale 0.38 0.38 3.1 1.45 3.1 1.45 0.32 0.32 2.9 1.35 2.9 1.35 REFERENCES JEDEC JEITA MO-217 Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver detail ...

Page 17

... NXP Semiconductors 15. Packing information The ISP1102AW (HBCC16 package) is delivered on a Type A carrier tape, see The tape dimensions are given in The reel diameter is 330 mm. The reel is made of polystyrene (PS) and is not designed for use in a baking process. The cumulative tolerance of 10 successive sprocket holes is 0.02 mm. The camber must not exceed 100 mm ...

Page 18

... Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window ISP1102A_1 Product data sheet Figure Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver 13) than a PbSn process, thus © NXP B.V. 2007. All rights reserved ...

Page 19

... Figure 13. maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver 3 ) 350 220 220 3 ) 350 to 2000 > 2000 260 260 250 ...

Page 20

... Application-Specific Integrated Circuit Complementary Metal-Oxide Semiconductor ElectroStatic Discharge Human Body Model Single-Ended Zero Universal Serial Bus Data sheet status Product data sheet Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver Change notice Supersedes - - © NXP B.V. 2007. All rights reserved ...

Page 21

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver © NXP B.V. 2007. All rights reserved ...

Page 22

... Table 12. Static characteristics: digital pins . . . . . . . . . . .10 Table 13. Static characteristics: analog I/O pins DP and .12 Table 14. Dynamic characteristics: analog I/O pins DP and .12 Table 15. Type A carrier tape dimensions for the ISP1102AW . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Table 16. SnPb eutectic process (from J-STD-020C .19 Table 17. Lead-free process (from J-STD-020C .19 Table 18. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .20 Table 19. Revision history . . . . . . . . . . . . . . . . . . . . . . . .20 ISP1102A_1 Product data sheet Rev. 01 — ...

Page 23

... Fig 10. Load on pins VM/VMO, VP/VPO and RCV . . . . .15 Fig 11. Package outline SOT639-2 (HBCC16 .16 Fig 12. Carrier tape dimensions .17 Fig 13. Temperature profiles for large and small components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 ISP1102A_1 Product data sheet Rev. 01 — 15 February 2007 ISP1102A Advanced USB transceiver continued >> © NXP B.V. 2007. All rights reserved ...

Page 24

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com ISP1102A All rights reserved. Date of release: 15 February 2007 Document identifier: ISP1102A_1 ...

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