mc33099dwr2 Freescale Semiconductor, Inc, mc33099dwr2 Datasheet - Page 10

• Manufacturer Part Number: mc33099dwr2
• Description: Adaptive Alternator Voltage Regulator
• Manufacturer: Freescale Semiconductor, Inc

Modulated (PWM) waveform having a variable ON / OFF duty
cycle ratio that is determined by an analog or a digital duty
cycle control circuitry that responds to variations in the
system voltage due to variations in system load current. The
PWM waveform has a duty cycle regulation output frequency
of about 395 Hz (f
101 kHz oscillator clock frequency (f
at the GATE pin is due to a charge pump GATE voltage (V
generated by voltage multiplication using an internal charge
pump voltage regulator. The high GATE-to-source voltage
applied to the external MOSFET during the ON cycle of the
PWM waveform minimizes a low drain-to-source ON
resistance (R
V
associated power dissipation in the MOSFET.
analog and digital duty cycle controllers to provide a Load
Response Control (LRC) duty cycle function when rotor
frequency f
cycle function is provided at the GATE output when
frequency f
mode when f
voltage due to a sudden increase in system load current will
cause the analog duty cycle to rapidly increase to as great as
100%. However, the LRC circuitry causes the digital duty
cycle to increase to 100% at a controlled predetermined LRC
rate and overrides the analog duty cycle. Thus the alternator
response time is decreased in the LRC mode and prevents
the alternator from placing a sudden high torque load on the
automobile engine during this slow RPM mode. This can
occur when a high current accessory is switched on to the 12
V system, producing a sudden drop in system voltage. When
frequency f
response is not in effect and the analog duty cycle controller
controls the PWM voltage waveform applied to the external
MOSFET to regulate the system voltage. By selectively
coupling the LRC1 and LRC2 pins to ground or leaving them
open, the user can program four different LRC rates (R
R
ON and engine start-up, the LRC rate is also in effect to
minimize alternator torque loading on the engine during start,
even when a Wide Open Throttle (WOT) condition (f
occurs.
directly drive lamp current as a fault indicator. The fault lamp
is connected between the low side of the ignition switch and
the LAMP DRAIN pin of the IC. A fault is indicated during an
undervoltage battery condition when frequency f
than frequency f
and when frequency f
f
or a slow or non-rotating rotor occurs due to a slipping or
broken belt. An external LAMP GATE pin is also provided for
the internal lamp driver to allow the user to override the
internal IC fault logic and externally drive the internal lamp
drive MOSFET.
Remote voltage to decrease but is not a Remote Open
condition, the system voltage will increase, causing an
10
33099
TYPICAL APPLICATIONS
ph
d(SAT)
lrc4
A unique feature of the 33099 is the combinational use of
An internal N-Channel MOSFET is provided on the IC to
When a loose wire or battery pin corrosion causes the
< f
) from 9.37%/sec to 37.4%/sec. During an initial ignition
1
when an insufficient alternator output voltage results
to maximize the field current while minimizing the
ph
ph
ph
1
DS(ON)
is less than frequency f
is greater than frequency f
is greater than frequency f
< f
2
ph
, during an overvoltage battery condition,
dc
) defined by an 8-bit division of an internal
) and associated drain-to-source voltage
< f
ph
2
, a sudden decrease in the system
is less than frequency f
osc
2
. A classic analog duty
). The GATE voltage
2
2
. During the LRC
, the slow LRC
1
ph
. Frequency
is greater
ph
> f
lrc1
2
g
-
)
)
overvoltage Lamp fault indication, and is regulated at a
secondary value of about 18.5 V.
protection circuitry prevents GATE-to-source drive to the
external MOSFET and to the internal lamp drive MOSFET.
This ensures that neither the field current nor the lamp
current is activated during load dump conditions. A drain-to-
GATE voltage clamp is also provided for the internal lamp
driver for further protection of this driver during load dump.
from the standby mode into a normal operating mode when
the ignition switch is ON and an ignition voltage (V
greater than a power up/down ignition threshold voltage
(V
than voltage V
current standby mode, when frequency f
can either be coupled to the low side of the ignition switch or
to the low side of the lamp. When the IGN pin is connected to
the low side of the lamp, the lamp must be shunted by a
resistor to ensure that ignition ON is sensed, even with an
OPEN lamp fault condition. When the lamp in ON, lamp
current is polled OFF periodically at an ignition polling
frequency in order for the IGN pin to periodically sense that
the ignition voltage is high even though the lamp is ON. An
ignition input pull-down current (I
voltage V
terminated on a high resistance.
sensitive analog circuit ground (AGND) from noisy digital and
high-current ground (GND).
ALTERNATOR REGULATOR BIASING AND
POWER UP/DOWN
voltage V
switch is ON and voltage V
1.25 V), a 5.0 V V
provides bias to a bandgap shunt voltage regulator. The
bandgap regulator maintains a reference voltage (V
approximately 2.0 V with an internal negative temperature
coefficient (-TC) as well as a 1.25 V Zero Temperature
Coefficient (OTC) reference voltage. Additional bias currents
and reference voltages, including a charge pump GATE
voltage V
typically ignition ON drain current (I
25°C. When the ignition switch is OFF and voltage V
less than V
mode, having a standby drain current of about 0.7 mA
(I
voltage regulators and bias currents are either terminated or
minimized. However, the V
voltage regulator continue to maintain voltages V
logic, the 2.0 V V
addition, all logic is reset in the standby mode.
voltage V
C
Ignition Delay circuit. After an Ignition start Delay Time of
500 ms, the Ignition Delay circuit activates additional current
Q1(off)
ign
Tign
During a system load dump condition, load dump
An ignition pin (IGN) is provided to activate the regulator
Two ground pins are provided by the 33099 to separate
The biasing of the regulator is derived from the BAT pin
After switching the ignition switch to the ON position,
to switch states, providing an ignition-ON signal to the
). When the ignition switch is OFF, voltage V
) at 25°C. During the sleep mode, some internal
bat
ign
g
ign
, are also generated from voltage V
Tign
. In the normal operating mode when the ignition
will exceed voltage V
to ground when the IGN pin is OPEN or
Tign
, the regulator is in a low current standby
ref
DD
, and the regulator is switched into a low
, and the 1.25 V reference voltage. In
voltage regulator biases the IC logic and
Analog Integrated Circuit Device Data
DD
ign
regulator and the bandgap
is greater than V
ign
Tign
Q1(on)
Freescale Semiconductor
) is provided to pull
,
causing comparator
ph
) is about 6.5 mA at
< f
1
bat
. The IGN pin
Tign
. The
DD
ign
ign
(about
ref
for the
ign
) is
is less
) of
is