mc33905s Freescale Semiconductor, Inc, mc33905s Datasheet - Page 45

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mc33905s

Manufacturer Part Number
mc33905s
Description
System Basis Chip Gen2 With High Speed Can And Lin Interface
Manufacturer
Freescale Semiconductor, Inc
Datasheet
SAFE mode B1, B2 and B3 illustration:
resistor or SPI configuration.
Analog Integrated Circuit Device Data
Freescale Semiconductor
The figure below illustrates the event, and consequences when SAFE Mode B1, B2 or B3 is selected via the appropriate debug
step 1: Failure illustration
gnd
enter in SAFE mode to evaluate resistor at DBG pin
RSTb
SAFE
Vdd
step 2:
Exclusive detection of
ECU external event to
Rdbg resistor or
SPI configuration
100ms delay time to enter in SAFE mode
disable Vdd based on
RSTb
SAFE
and monitor ECU external events
RSTb
SAFE
Vdd
Vdd
8 x 256ms delay time to enter in SAFE mode
100ms deglitcher time to activate SAFE and
failure event, i.e W/D
OFF state ON state
to evaluate resistor at DBG pin
OFF state ON state
OFF state
failure event, Vdd low
failure event, Reset s/c gnd
and monitor ECU external events
and monitor ECU external events
to evaluate resistor at DBG pin
1st
Vdd_UV th
2.5V
Behavior illustration for safe state B (Rdg > 10kOhms)
100ms
2nd
Figure 26. SAFE Modes B1, B2 or B3 Behavior Illustration
100ms
DBG resistor => safe state B1
DBG resistor => safe state B2
DBG resistor => safe state B3
ON state
CAN bus
CAN bus
I/O-1
8th
I/O-1
step 3: Consequences for Vdd
gnd
Vdd
SAFE
SAFE
RSTb
SAFE
RSTb
RSTb
Vdd
Vdd
CAN bus idle time
I/O-1 high to low transition
I/O-1 high to low transition
CAN bus idle time
Vdd < Vdd_UVth
BEHAVIOR AT POWER UP AND POWER DOWN
Vdd OFF
If Reset s/c gnd recovered
If Vdd failure recovered
Vdd OFF
FAIL SAFE OPERATION
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