mc33879a Freescale Semiconductor, Inc, mc33879a Datasheet - Page 19

• Manufacturer Part Number: mc33879a
• Description: Configurable Octal Serial Switch With Open Load Detect Current Disable
• Manufacturer: Freescale Semiconductor, Inc

POWER SUPPLY
mode currents. The device may enter Sleep mode via the EN
pin or the V
current consumed by the V
registers to the Power-ON Reset state. The reset state is
defined as all outputs off and Open Load Detection Current
disabled.
outputs off and apply logic low to the EN input pin or remove
power from the V
the device, it is recommended that all control inputs from the
MCU be low.
PARALLELING OF OUTPUTS
the paralleling of outputs for increased current capability.
R
coefficient that provides balanced current sharing between
outputs without destructive operation. This mode of operation
may be desirable in the event the application requires lower
power dissipation or the added capability of switching higher
currents. Performance of parallel operation results in a
corresponding decrease in R
Open Load Detection Currents and the output current limits
increase correspondingly. Paralleling outputs from two or
more different IC devices is possible but not recommended.
FAULT LOGIC OPERATION
over other devices using SPI communications. As command
word one is being written into the shift register, a fault status
word is being simultaneously written out and received by the
MCU. Regardless of the configuration, with no outputs
faulted and Open Load Detection Current enabled, all status
bits being received by the MCU will be zero. When outputs
are faulted (off state open circuit or on state short circuit /
will be one. The distinction between open circuit fault and
short / overtemperature is completed via the command word.
For example, when a zero command bit is sent and a one
fault is received in the following word, the fault is open / short-
to-battery for high-side drive or open / short-to-ground for low-
side drive. In the same manner, when a one command bit is
sent and a one fault is received in the following word, the fault
is a short-to-ground / overtemperature for high-side drive or
short-to-battery/overtemperature for low-side drive. The
timing between two write words must be greater than 300 Ps
to allow adequate time to sense and report the proper fault
status.
overtemperature), the status bits being received by the MCU
Analog Integrated Circuit Device Data
Freescale Semiconductor
DS(ON)
The 33879 device has been designed with ultra-low Sleep
Placing the 33879 in Sleep mode resets the internal
To place the 33879 in the Sleep mode, either command all
Using MOSFETs as an output switch conveniently allows
Fault logic of the 33879 device has been greatly simplified
of MOSFETs have an inherent positive temperature
DD
pin. In the Sleep mode (EN or V
DD
supply pin. Prior to removing V
PWR
DS(ON)
pin is less than 5.0 PA.
while the output OFF
DD
d 0.8 V), the
DEVICE OPERATION
DD
from
SPI INTEGRITY CHECK
initial power-up of the V
After initial system start-up or reset, the MCU will write one
32-bit pattern to the 33879. The first 16 bits read by the MCU
will be 8 logic [0]s followed by the fault status of the outputs.
The second 16 bits will be the same bit pattern sent by the
MCU. By the MCU receiving the same bit pattern it sent, bus
integrity is confirmed. Please note the second 16-bit pattern
the MCU sends to the device is the command word and will
be transferred to the outputs with rising edge of
implemented to ensure integrity of SPI communications. SPI
messages consisting of 16 SCLK pulses and multiples of
8 clock pulses thereafter will be acknowledged. SPI
messages consisting of other than 16 + multiples of 8 SCLK
pulses will be ignored by the device.
OVERTEMPERATURE FAULT
specifically incorporated for each individual output. The
shutdown following an overtemperature condition is
independent of the system clock or any other logic signal.
Each independent output shuts down at 155
When an output shuts down owing to an overtemperature
fault, no other outputs are affected. The MCU recognizes the
fault by a one in the fault status register. After the 33879
device has cooled below the switch point temperature and
15
by the MCU via SPI to shut down.
OVERVOLTAGE FAULT
device to shut down all outputs until the overvoltage condition
is removed. When the overvoltage condition is removed, the
outputs will resume their previous state. This device does not
detect an overvoltage on the V
threshold on the V
1.0 V typical hysteresis. A V
global, causing all outputs to be turned OFF.
OUTPUT OFF OPEN LOAD FAULT
reporting of an open load when the corresponding output is
disabled (input bit programmed to a logic low state). The
Output OFF Open Load fault is detected by comparing the
drain-to-source voltage of the specific MOSFET output to an
internally generated reference. Each output has one
dedicated comparator for this purpose.
°
Checking the integrity of the SPI communication with the
Important A SCLK pulse count strategy has been
Overtemperature detection and shutdown circuits are
An overvoltage condition on the V
An output OFF open load fault is the detection and
C hysteresis, the output will activate unless told otherwise
PWR
pin is specified as V
DD
and EN pins is recommended.
PWR
DD
FUNCTIONAL DESCRIPTION
overvoltage detection is
pin. The overvoltage
PWR
DEVICE OPERATION
pin will cause the
PWR(OV)
°
C to 185
CS
.
V, with
°
C.
33879
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