adm6995 ETC-unknow, adm6995 Datasheet - Page 13

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adm6995

Manufacturer Part Number
adm6995
Description
Port 10/100 Mb/s Single Chip Ethiernet Switch Controller
Manufacturer
ETC-unknow
Datasheet

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ADM6995L
ADMtek Inc.
2.2
2.2.1
2.2.2
Pin Name
RXP[0:4]
RXN[0:4]
TXP[0:4]
TXN[0:4]
GFCEN
P4FX
PHYAS0
Pin Name
Pin Description by Function
ADM6995L pins are categorized into one of the following groups:
Note:
“Section 1.5.2 Pin Types” can be used for reference.
Section 2.2.1 Twisted Pair Interface
Section 2.2.2 Settings
Section 2.2.3 LED Interface
Section 2.2.4 EEPROM/Management Interface
Section 2.2.5 Power/Ground, 48 pins
Section 2.2.6 MISC
Twisted Pair Interface
Setting
126, 11, 24, 37, 41
127, 12, 25, 38, 40
123, 8, 21, 34, 44
124, 9, 22, 35, 43
Pin#
Pin#
63
62
66
Analog
Analog
Analog
Analog
Type
Type
8mA
8mA
I/O,
I/O,
I/O,
I/O,
I/O,
PU
PD
PD
I/O
I
Descriptions
Twisted Pair Receive Input Positive.
Twisted Pair Receive Input Negative.
Twisted Pair Transmit Output Positive.
Twisted Pair Transmit Output Negative.
Setting
GFCEN: Global Flow Control Enable.
At power-on-reset, latched as Full Duplex Flow control
setting
“1” to enable flow-control (default ), “0” to disable flow-
control.
Port4 FX/TX mode select. Internal pull down.
1: Port4 as FX port.
0: Port4 as TX port.
Setting
PHYAS0: Chip physical address for multiple chip application
on read EEPROM data. Internal pull down.
Power on reset value PHYAS0 combines with PHYAS1
PHYAS1
0
If there is no EEPROM then user must use 93C66 timing to
write chip’s register.
If user put 93C46 with correct Signature then user writes
chip register by 93C46 timing.
PHYAS0
0
Descriptions
Master(93C46)
Interface Description
2-2

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