adm6995 ETC-unknow, adm6995 Datasheet - Page 42

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adm6995

Manufacturer Part Number
adm6995
Description
Port 10/100 Mb/s Single Chip Ethiernet Switch Controller
Manufacturer
ETC-unknow
Datasheet

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ADM6995L
ADMtek Inc.
4.4
RESETL
0
Rising edge 0 1
(30ms)
1 (after 30ms)
EEPROM Access
Customer can select ADM6995L read EEPROM contents as chip setting or not.
ADM6995L will check the signature of
EEPROM to decide read content of EEPROM or not.
RESETL & EEPROM content relationship
Keep at least 30ms after RESETL from 0 1. ADM6995L will read data from EEPROM.
After RESETL if CPU update EEPROM that ADM6995L will update configuration
registers too.
When CPU programming EEPROM & ADM6995L, ADM6995L recognizes the
EEPROM WRITE instruction only. If there is any Protection instruction before or after
the EEPROM WRITE instruction, CPU needs to generate separated CS signal cycle for
each Protection & WRITE instruction.
CPU can directly program ADM6995L after 30ms of Reset signal rising edge with or
without EEPROM
ADM6995L serial chips will latch hardware-reset value as recommend value. It includes
EEPROM interface:
EECS: Internal Pull down 40K resister.
EESK: TP port Auto-MDIX select. Internal pull down 40K resister as non Auto-MDIX
mode.
EDI: Dual Color Select. Internal pull down 40K resister as Single Color Mode.
EDO: EEPROM enable. Internal pull up 40K resister as EEPROM enable.
Below Figure is ADM6995L serial chips EEPROM pins operation at different stage.
Reset signal is control by CPU with at least 100ms low. Point1 is Reset rising edge. CPU
must prepare proper value on EECS(0), EESK, EDI, EDO(1) before this rising edge.
ADM6995L will read this value into chip at Point2. CPU must keep these values over
point2. Point2 is 200ns after Reset rising edge.
ADM6995L serial chips will read EEPROM content at Point4 which 800ns far away
from the rising edge of Reset. CPU must turn EEPROM pins EECS, EESK, EDI and
EDO to High-Z or pull high before Point4.
If user want change state to High-Z or pull high on EEPROM pins, the order is CS-> DI -
> DO -> SK is better.
CS
High Impedance
Output
Input
SK
High Impedance
Output
Input
DI
High Impedance
Output
Output
DO
High Impedance
Input
Input
Register Description
4-12

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