adm6996f Infineon Technologies Corporation, adm6996f Datasheet - Page 55

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adm6996f

Manufacturer Part Number
adm6996f
Description
6 Port 10/100 Mb/s Single Chip Ethernet Switch Controller
Manufacturer
Infineon Technologies Corporation
Datasheet

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ADM6996F
Infineon-ADMtek Co Ltd
12
11
10
9
8
7
Bits
R/W,
Type Name
R/W ANEN
R/W PDN
R/W ISO
R/W DPLX
R/W COLTST
SC
ANEN_RST Restart Auto Negotiation
Description
Link speed is selected by this bit or by auto negotiation if bit
12 of this register is set (in which case, the value of this bit is
ignored).
If it is fiber mode, 0.13 is always 1. Any write to this bit will
have no effect.
Auto Negotiation Enable
1 – Enable auto negotiation process
0 – Disable Auto negotiation process
This bit determines whether the link speed should set up by
the auto negotiation process or not. It is set at power up or
reset if the PI_RECANEN pin detects a logic 1 input level in
Twisted-Pair Mode.
If it is set when fiber mode is configured, any write to this bit
will be ignored.
1 – Power Down
0 – Normal Operation
Ored result with PI_PWRDN pin. Setting this bit high or
asserting the PI_PWRDN puts the D7001 into power down
mode. During the power down mode, TXP/TXN and all
LED outputs are tri-stated and the MII interfaces are isolated.
Isolate D7001 from Network
1 – Isolate PHY from MII
0 – Normal Operation
Setting this control bit isolates the part from the MII, with the
exception of the serial management interface. When this bit
is asserted, the D7001 does not respond to TXD, TXEN and
TXER inputs, and it presents a high impedence on its TXC,
RXC, CRSDV, RXER, RXD, COL and CRS outputs.
1 – Restart Auto Negotiation Process
0 – Normal Operation
Setting this bit while auto negotiation is enabled forces a new
auto negotiation process to start. This bit is self-clearing and
returns to 0 after the auto negotiation process has
commenced.
1 – Full Duplex mode
0 – Half Duplex mode
If auto negotiation is disabled, this bit determines the duplex
mode for the link.
Collision Test
1 – Enable COL signal test
0 – Disable COL signal test
When set, this bit will cause the COL signal of MII interface
Power Down Enable
Duplex Mode
Register Description
Initial value
0x1h
0x0h
0x0h
0x0h
0x1h
0x0h
4-3

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