lan91c100 Standard Microsystems Corp., lan91c100 Datasheet - Page 69

• Manufacturer Part Number: lan91c100
• Description: Feast ? Ast Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

On EEPROM write operations (after setting the
STORE bit) the values of the CONFIGURATION
REGISTER and BASE REGISTER are written in
the EEPROM locations defined by the IOS2-0
pins.
The three least significant bits of the CONTROL
REGISTER (EEPROM SELECT, RELOAD and
STORE) are used to control the EEPROM.
Their values are not stored nor loaded from the
EEPROM.
b)
On EEPROM read operations (after setting
RELOAD high) the EEPROM word address
defined by the POINTER REGISTER 6 least
significant bits is read into the GENERAL
PURPOSE REGISTER.
On EEPROM write operations (after setting the
STORE bit) the value of
GENERAL
EEPROM SELECT bit = 1
PURPOSE
the GENERAL
REGISTER
-
69
PURPOSE
EEPROM
POINTER REGISTER 6 least significant bits.
RELOAD and STORE are set by the user to
initiate read and write operations respectively.
Polling the value until read low is used to
determine completion.
access is in progress the STORE and RELOAD
bits of CTR will readback as both bits high. No
other bits of FEAST can be read or written until
the EEPROM operation completes and both bits
are clear.
reset initiated reloads.
Note: If no EEPROM is connected to the
LAN91C900, for example for some embedded
applications,
grounded and no accesses to the EEPROM will
be
Individual Address assume their default values
upon hardware reset and the CPU is responsible
for programming them for their final value.
attempted.
word
This mechanism is also valid for
REGISTER
the
Configuration,
address
ENEEP
When an EEPROM
is
defined
pin
written
Base,
should
by
at
and
the
the
be