lan9117 Standard Microsystems Corp., lan9117 Datasheet - Page 108
lan9117
Manufacturer Part Number
lan9117
Description
Lan9117 High-performance Single-chip 10/100 Non-pci Ethernet Controller
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9117.pdf
(136 pages)
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Revision 1.5 (07-11-08)
5.5
(IN DECIMAL)
INDEX
17
18
27
29
30
31
0
1
2
3
4
5
6
The PHY registers are not memory mapped. These registers are accessed indirectly through the MAC
via the MII_ACC and MII_DATA registers. An index must be used to access individual PHY registers.
PHY Register Indexes are shown in
Note: The NASR (Not Affected by Software Reset) designation is only applicable when bit 15 of
PHY Registers
the PHY Basic Control Register (Reset) is set.
REGISTER NAME
Basic Control Register
Basic Status Register
PHY Identifier 1
PHY Identifier 2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Auto-Negotiation Expansion Register
Mode Control/Status Register
Special Modes Register
Special Control/Status Indications
Interrupt Source Register
Interrupt Mask Register
PHY Special Control/Status Register
Table 5.8 LAN9117 PHY Control and Status Register
PHY CONTROL AND STATUS REGISTERS
DATASHEET
Table 5.8, "LAN9117 PHY Control and Status
108
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Register"below.
SMSC LAN9117
Datasheet