lan9117 Standard Microsystems Corp., lan9117 Datasheet - Page 16

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lan9117

Manufacturer Part Number
lan9117
Description
Lan9117 High-performance Single-chip 10/100 Non-pci Ethernet Controller
Manufacturer
Standard Microsystems Corp.
Datasheet

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Revision 1.5 (07-11-08)
NO.
PIN
NO.
PIN
67
68
69
79
78
83
82
87
PHY External Bias
EEPROM Clock,
EEPROM Data,
GPO3, TX_EN,
EEPROM Chip
GPO4 RX_DV,
RX_CLK
TX_CLK
NAME
Resistor
Select
NAME
RXP
RXN
TXP
TXN
RX_DV/RX_CLK
TX_EN/TX_CLK
EECLK/GPO4/
Table 2.4 Serial EEPROM Interface Signals
EEDIO/GPO3/
SYMBOL
EXRES1
SYMBOL
TPO+
TPO-
TPI+
EECS
TPI-
Table 2.3 LAN Interface Signals
DATASHEET
BUFFER
TYPE
BUFFER
AO
AO
AI
AI
AI
TYPE
I/O8
16
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
O8
O8
NUM
PINS
NUM
PINS
1
1
1
1
1
1
1
1
Twisted Pair Transmit Output,
Positive
Twisted Pair Transmit Output,
Negative
Twisted Pair Receive Input, Positive
Twisted Pair Receive Input, Negative
Must be connected to ground through
a 12.4K ohm 1% resistor.
EEPROM Data: This bi-directional
pin can be connected to a serial
EEPROM DIO. This is optional.
General Purpose Output 3: This
pin can also function as a general
purpose output, or it can be
configured to monitor the TX_EN or
TX_CLK signals on the internal MII
port. When configured as a GPO
signal, or as a TX_EN/TX_CLK
monitor, the EECS pin is deasserted
so as to never unintentionally access
the serial EEPROM. This signal
cannot function as a general-
purpose input.
Serial EEPROM chip select.
EEPROM Clock: Serial EEPROM
Clock pin.
General Purpose Output 4: This
pin can also function as a general-
purpose output, or it can be
configured to monitor the RX_DV or
RX_CLK signals on the internal MII
port. When configured as a GPO
signal, or as an RX_DV/RX_CLK
monitor, the EECS pin is deasserted
so as to never unintentionally access
the serial EEPROM. This signal
cannot function as a general-
purpose input.
Note:
When the EEPROM
interface is not used, the
EECLK pin must be left
unconnected.
DESCRIPTION
DESCRIPTION
SMSC LAN9117
Datasheet

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