lan9218 Standard Microsystems Corp., lan9218 Datasheet - Page 86

• Manufacturer Part Number: lan9218
• Description: Lan9218 High-performance Single-chip 10/100 Ethernet Controller With Hp Auto-mdix Support
• Manufacturer: Standard Microsystems Corp.

Revision 2.3 (08-06-08)
5.3.18
5.3.19
BITS
BITS
31:0
31-0
Free Running SCLK Counter (FR_CNT):
Note:
Note:
RX Dropped Frame Counter (RX_DFC). This counter is incremented every
time a receive frame is dropped. RX_DFC is cleared on any read of this
register.
An interrupt can be issued when this counter passes through its halfway
point (7FFFFFFFh to 80000000h).
FREE_RUN—Free-Run 25MHz Counter
This register reflects the value of the free-running 25MHz counter.
RX_DROP– Receiver Dropped Frames Counter
This register indicates the number of receive frames that have been dropped.
Offset:
Offset:
This field reflects the value of a free-running 32-bit counter. At reset
the counter starts at zero and is incremented for every 25MHz
cycle. When the maximum count has been reached the counter will
rollover. When read in 16-bit mode the count value is latched on
the first read. The FREE_RUN counter can take up to 160nS to
clear after a reset event.
This counter will run regardless of the power management states
D0, D1 or D2.
DESCRIPTION
DESCRIPTION
9Ch
A0h
DATASHEET
86
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX Support
Size:
Size:
32 bits
32 bits
TYPE
TYPE
RO
RC
00000000h
DEFAULT
DEFAULT
SMSC LAN9218
Datasheet
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