lan9500 Standard Microsystems Corp., lan9500 Datasheet - Page 12

• Manufacturer Part Number: lan9500
• Description: Lan9500/lan9500i Hi-speed Usb 2.0 To 10/100 Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

Revision 1.4 (07-07-08)
NUM PINS
1
1
Transmit Data
Transmit Data
Purpose I/O 7
Transmit Data
Transmit Data
Purpose I/O 6
(Internal PHY
(Internal PHY
(Internal PHY
(Internal PHY
Configuration
Configuration
PHY Mode)
Mode Only)
PHY Mode)
Mode Only)
EEPROM
USB Port
(External
(External
General
General
NAME
Mode)
Mode)
Swap
Strap
Strap
Size
3
3
2
2
PORT_SWAP
EEP_SIZE
SYMBOL
Table 2.1 MII Interface Pins (continued)
GPIO7
GPIO6
TXD3
TXD3
TXD2
TXD2
DATASHEET
BUFFER
IS/O8/
IS/O8/
TYPE
IS/O8
IS/O8
(PU)
(PU)
OD8
(PU)
(PU)
(PD)
(PD)
OD8
(PU)
(PD)
O8
O8
IS
IS
12
Transmit Data 3: In internal PHY mode, this pin
can be configured to display the respective
internal MII signal.
Transmit Data 3: In external PHY mode, this pin
functions as the transmit data 3 output to the
external PHY.
General Purpose I/O 7
EEPROM SIZE: The EEP_SIZE strap selects the
size of the EEPROM attached to the
LAN9500/LAN9500i.
0 = 128 byte EEPROM is attached and a total of
seven address bits are used.
1 = 256/512 byte EEPROM is attached and a
total of nine address bits are used.
See
configuration straps.
Transmit Data 2: In internal PHY mode, this pin
can be configured to display the respective
internal MII signal.
Transmit Data 2: In external PHY mode, this pin
functions as the transmit data 2 output to the
external PHY.
General Purpose I/O 6
USB Port Swap Configuration Strap: Swaps
the mapping of USBDP and USBDM.
0 = USBDP maps to the USB D+ line and
USBDM maps to the USB D- line.
1 = USBDP maps to the USB D- line. USBDM
maps to the USB D+ line.
See
configuration straps.
Note 2.1
Note 2.1
Hi-Speed USB 2.0 to 10/100 Ethernet Controller
for more information on
for more information on
DESCRIPTION
SMSC LAN9500/LAN9500i
Datasheet