lan9500 Standard Microsystems Corp., lan9500 Datasheet - Page 18

• Manufacturer Part Number: lan9500
• Description: Lan9500/lan9500i Hi-speed Usb 2.0 To 10/100 Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

Revision 1.4 (07-07-08)
(Figure
NUM PINS
NUM PINS
NUM PINS
Exposed
package
pad on
bottom
1
4
1
1
5
2
1
2.1)
Power Supply
PHY Interrupt
(Internal PHY
PHY Interrupt
+3.3V Analog
External PHY
Bias Resistor
Ethernet PLL
+1.8V Power
+1.8V Power
Digital Core
No Connect
PHY Mode)
+3.3V I/O
(External
Ground
Supply
Supply
NAME
NAME
Output
NAME
Mode)
Power
Table 2.7 I/O Power Pins, Core Power Pins, and Ground Pad
VDD18CORE
VDD18PLL
nPHY_INT
nPHY_INT
SYMBOL
SYMBOL
VDD33IO
SYMBOL
Table 2.6 Ethernet PHY Pins (continued)
VDD33A
EXRES
VSS
NC
Table 2.8 No-Connect Pins
DATASHEET
BUFFER
BUFFER
BUFFER
TYPE
IS_5V
TYPE
TYPE
(PU)
O8
AI
P
P
P
P
P
18
-
PHY Interrupt (Active-Low): In internal PHY
mode, this signal can be configured to output the
internal PHY interrupt signal.
Note:
PHY Interrupt (Active-Low): In external PHY
mode, the signal on this pin is input from the
external PHY and indicates a PHY interrupt has
occurred.
+3.3V Analog Power Supply
Refer to the LAN9500/LAN9500i reference
schematic for connection information.
internal bias circuits. Connect to an external
12.4K 1.0% resistor to ground.
Ethernet PLL +1.8V Power Supply: This pin
must be connected to VDD18CORE for proper
operation.
Refer to the LAN9500/LAN9500i reference
schematic for additional connection information.
+3.3V Power Supply for I/O Pins
Refer to the LAN9500/LAN9500i reference
schematic for connection information.
Digital Core +1.8V Power Supply Output
Refer to the LAN9500/LAN9500i reference
schematic for connection information.
Common Ground
No Connect: These pins must be left floating for
normal device operation
External PHY Bias Resistor: Used for the
Hi-Speed USB 2.0 to 10/100 Ethernet Controller
The internal PHY interrupt signal is
active-high.
DESCRIPTION
DESCRIPTION
DESCRIPTION
SMSC LAN9500/LAN9500i
Datasheet