peb20550 Infineon Technologies Corporation, peb20550 Datasheet - Page 104

• Manufacturer Part Number: peb20550
• Description: Extended Pcm Interface Controller
• Manufacturer: Infineon Technologies Corporation

5.2.2.3 CFI Characteristics
In the following the configurable interface characteristics that can be programmed in the
CFI registers are explained in more detail.
CFI Mode CMD1:CMD1, CMD0
The CFI mode primarily defines the actual number of CFI ports that can be used for
switching purposes (logical ports). 1, 2 or 4 duplex or 8 bidirectional logical CFI ports can
be selected. Since the channel capacity of the EPIC is constant (128 channels/direction),
the CFI mode also influences the maximum possible data rate.
In each CFI mode a reference clock (RCL) of a specific frequency is required. This clock
may be derived from the PCM clock signal PDC (CMD1:CSS = 0) or from the DCL signal
(CMD1:CSS = 1). Also refer to figure 30 and figure 31.
Table 15 states the specific characteristics of each CFI mode.
(DR = CFI data rate, N = number of 8 bit time slots in PCM frame, du = duplex port,
bi = bidirectional port).
Table 15
Note: The label is used to specify a CFI port when programming a switching function. It
Semiconductor Group
CMD1 CMD0 CFI
1
0
0
1
should not be confused with the physical port number which refers to actual
hardware pins. The relationship between logical and physical port numbers is
given in table 19 and is illustrated in figure 46.
1
0
1
0
Mode
3
0
1
2
Number
(Label) of
Logical
Ports
8 bi (0 … 7)
4 du (0 … 3)
2 du (0 … 1)
1 du
128
128
128
128
min. max.
CFI Data
[kbit/s]
Rate
1024
2048
4096
8192
104
Min. Required
CFI DR
[kbit/s]
relative to
PCM Data
Rate
16N/3
32N/3
64N/3
64N/3
Necessary
Reference
Clock
(RCL)
4 DR
2 DR
DR
0.5 DR
Application Hints
DCL Output
Frequencies
CMD1:
CSS = 0
DR, 2 DR
DR, 2 DR
DR
DR
PEB 2055
PEF 2055