mcz33800ek/r2 Freescale Semiconductor, Inc, mcz33800ek/r2 Datasheet - Page 13

• Manufacturer Part Number: mcz33800ek/r2
• Description: Engine Control Integrated Circuit
• Manufacturer: Freescale Semiconductor, Inc

Table 4. Dynamic Electrical Characteristics
otherwise noted. Typical values noted reflect the approximate parameter means at T
otherwise noted.
OCTAL SERIAL DRIVERS (OUT1 - OUT8) (CONTINUED)
OSCILLATOR AND TIMER ACCURACY
SPI DIGITAL INTERFACE TIMING (SO, SI, CS, SCLK)
Notes
Analog Integrated Circuit Device Data
Freescale Semiconductor
Output Off Open Circuit Fault Filter Timer
Output Slew Rate
P1 Input Propagation Delay
P3, P5, P7 Input Propagation Delay
Calibrated Timer Accuracy
Un-calibrated Timer Accuracy
Required Low State Duration on V
Falling Edge of CS to Rising Edge of SCLK
Falling Edge of SCLK to Rising Edge of
SI to Rising Edge of SCLK
Rising Edge of SCLK to SI
SI,
SI,
Time from Falling Edge of
Time from Rising Edge of
Time from Falling Edge of SCLK to SO Data Valid
Sequential Transfer Rate
11.
12.
13.
14.
15.
16.
17.
Characteristics noted under conditions 3.0V ≤ V
R
R
Input @ 50% V
Input @ 50% V
Input @ 50% V
Input @ 50% V
V
Required Setup Time
Required Setup Time
Required Setup Time
Required Hold Time
Time required between data transfers
CS
CS
LOAD
LOAD
PWR
, SCLK Signal Rise Time
, SCLK Signal Fall Time
Assumes oscillator has been calibrated using SPI Calibrate Command
These parameters are guaranteed by design. Production test equipment uses 1MHz, 5.0V SPI interface.
This parameter is guaranteed by design, however it is not production tested.
Rise and Fall time of incoming SI,
Time required for valid output status data to be available on SO pin.
Time required for output states data to be terminated at SO pin.
Time required to obtain valid data out from SO following the fall of SCLK with 200pF load.
≤ 0.2V
= 51Ω
= 51Ω
DD
DD
DD
DD
to Output voltage 10% of final value
to Output voltage 90% of initial value
to Output voltage 10% of final value
to Output voltage 90% of initial value
CS
CS
(11)
Characteristic
to SO High-impedance
to SO Low-impedance
(14)
(14)
PWR
for Reset
CS
CS
(11)
, and SCLK signals for design consideration to prevent the occurrence of double pulsing.
(13)
(17)
(15)
(16)
(12)
DD
≤ 5.5V, 9.0V ≤ V
PWR
t
t
t
t
≤ 18V, - 40°C ≤ T
(RISEDELAY)
(FALLDELAY)
(RISEDELAY)
(FALLDELAY)
t
t
t
Symbol
t
SR(RISE)
SR(FALL)
t
SI (HOLD)
t
t
t
t
SO (DIS)
t
SO (EN)
RESET
t
t
t
TIMER
TIMER
SI (SU)
t
VALID
t
LEAD
R (SI)
t
F (SI)
STR
LAG
OC
A
DYNAMIC ELECTRICAL CHARACTERISTICS
= 25°C under nominal conditions, unless
A
≤ 125°C, GND = 0V, unless
Min
400
100
1.0
1.0
1.0
ELECTRICAL CHARACTERISTICS
50
16
20
–
–
–
–
–
–
–
Typ
500
5.0
5.0
5.0
5.0
25
–
–
–
–
–
–
–
–
–
Max
650
±10
±80
150
150
150
6.0
6.0
5.0
5.0
1.0
10
10
–
–
–
–
–
–
–
V/µs
Unit
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
%
%
33800
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