saf1761 NXP Semiconductors, saf1761 Datasheet - Page 137
saf1761
Manufacturer Part Number
saf1761
Description
Hi-speed Universal Serial Bus On-the-go Controller
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1761.pdf
(166 pages)
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SAF1761_1
Product data sheet
15.1.2.3 Multi-cycle: DMA read
Table 174. DMA read (multi-cycle burst)
T
Symbol
V
t
t
t
t
T
t
t
t
V
t
t
t
t
T
t
t
t
a16
a26
d16
w16
a36
a46
h16
a16
a26
d16
w16
a36
a46
h16
amb
Fig 23. DMA read (multi-cycle burst)
cy16
cy16
CC(I/O)
CC(I/O)
= 40 C to +85 C; unless otherwise specified.
= 1.65 V to 1.95 V
= 3.3 V to 3.6 V
DREQ and DACK are active HIGH.
Parameter
DACK assertion after DREQ assertion time
RD_N assertion after DACK assertion time
data valid time after RD_N assertion
RD_N pulse width
read-to-read cycle time
DREQ de-assertion time after last burst RD_N
de-assertion
DACK de-assertion to next DREQ assertion time
data hold time after RD_N de-asserts
DACK assertion after DREQ assertion time
RD_N assertion after DACK assertion time
data valid time after RD_N assertion
RD_N pulse width
read-to-read cycle time
DREQ de-assertion time after last burst RD_N
de-assertion
DACK de-assertion to next DREQ assertion time
data hold time after RD_N de-asserts
DREQ
DACK
RD_N
DATA
Rev. 01 — 18 November 2009
t
a16
t
a26
t
d16
t
w16
data 0
T
t
h16
cy16
data 1
data n-1
Hi-Speed USB OTG controller
t
a36
data n
Min
0
0
-
38
46
-
-
-
0
0
-
17
38
-
-
-
t
a46
004aaa531
SAF1761
© NXP B.V. 2009. All rights reserved.
Max
-
-
31
-
-
30
82
5
-
-
16
-
-
20
82
5
137 of 166
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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