saf1760 NXP Semiconductors, saf1760 Datasheet - Page 57
saf1760
Manufacturer Part Number
saf1760
Description
Saf1760 Hi-speed Universal Serial Bus Host Controller For Embedded Applications
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1760.pdf
(110 pages)
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SAF1760_1
Product data sheet
9.1 High-speed bulk IN and OUT
Table 65
Transfer Descriptor (TD).
1. Start the PTD memory vertical traversal, considering the skip and LastPTD
2. If the current PTD is active and not done, perform the transaction.
3. Follow the NextPTD pointer as specified in bits 4 to 0 of DW4.
4. If combined with LastPTD, the LastPTD setting must be at a higher address than the
5. If combined with skip, the skip must not be set (logically) on the same position
6. If PTD is set for skip, it will be neglected and the next vertical PTD will be considered.
7. If the skipped PTD already has a setting including a NextPTD pointer that will not be
Fig 12. NextPTD traversal rule
information, as follows.
NextPTD specified. Both have to be set in a logical manner.
corresponding to NextPTD, pointed by the NextPTD pointer.
taken into consideration, the behavior will be just as described in the preceding step.
CHECK FOR
shows the bit allocation of the high-speed bulk IN and OUT, asynchronous
VALID AND
ACTIVE BIT
no
SET?
Rev. 01 — 9 November 2009
yes
no
FOLLOW NEXT
PTD POINTED
EXECUTION
BY NEXTPTD
START PTD
START PTD
POINTER
SCHEDULE
SKIPPED?
PTD
Embedded Hi-Speed USB host controller
yes
VERTICAL
NEXTPTD
POINTER
yes
GO TO
IS PTD
NULL?
SAF1760
© NXP B.V. 2009. All rights reserved.
no
004aaa883
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