m66252fp Mitsumi Electronics, Corp., m66252fp Datasheet - Page 2

• Manufacturer Part Number: m66252fp
• Description: 1152 X 8-bit Line Memory Fifo
• Manufacturer: Mitsumi Electronics, Corp.

FUNCTION
When the status of write enable input WE is “L,” data on D
thru D
clock input WCK rise edges. At this time, write address
counter executes counting.
The following write-related operations are also performed
synchronously with WCK rise edges.
When WE is “H,” writing on memory is inhibited, and write ad-
dress counter stops counting.
When write reset input WRES is “L,” write address counter is
initialized.
ABSOLUTE MAXIMUM RATINGS
Note 1: Ta
RECOMMENDED OPERATIONAL CONDITIONS
ELECTRICAL CHARACTERISTICS
2
V
V
V
P
T
V
GND
T
V
V
V
V
I
I
I
I
I
C
C
IH
IL
OZH
OZL
CC
opr
CC
I
O
d
stg
CC
IH
IL
OH
OL
I
O
Symbol
Symbol
Symbol
7
Ta
are written on the memory synchronously with write
62 C are derated at –8.8mW/ C (24P
51 C are derated at –7.5mW/ C (24P
Supply voltage
Input voltage
Output voltage
Power dissipation
Storage temperature
Supply voltage
Supply voltage
Ambient temperature
“H” input voltage
“L” input voltage
“H” output voltage
“L” output voltage
“H” input current
“L” input current
“H” output current under “off” condition
“L” output current under “off” condition
Average supply current during operation
Input capacitance
Output capacitance under “off” condition
Parameter
Parameter
Parameter
(T
a
(T
= –20 ~ 70 C unless otherwise noted)
a
4
2
= –20 ~ 70 C, V
Y)
W)
I
I
V
V
V
V
V
t
f = 1MHz
f = 1MHz
CC
OH
OL
WCK
I
I
O
O
I
= V
= GND
= V
= 5V 10%, GND = 0V)
= V
= GND
= 4mA
= –4mA
, t
CC
IH
0
CC
RCK
, V
Reference pin: GND
Ta = 25 C
Test conditions
IL
= 100ns
WE, WRES, WCK, RE,
RRES, RCK
D
WE, WRES, WCK, RE,
RRES, RCK
D
, Outputs are open
Min.
0
0
–20
4.5
When read enable input RE is “L,” data on memory are out-
put to Q
rise edges. At this time, read address counter executes
counting.
The following read-related operations are also performed
synchronously with RCK rise edges.
When RE is “H,” reading from memory is inhibited, and read
address counter stops counting. The status of Q
comes high-impedance.
When read reset input RRES is “L,” read address counter is
initialized.
~D
~D
7
7
Conditions
0
Limits
Typ.
thru Q
5
0
7
synchronously with read clock input RCK
Max.
5.5
70
V
1152 x 8-BIT LINE MEMORY (FIFO)
CC
Min.
2.0
MITSUBISHI DIGITAL ASSP
– 0.8
–0.5 ~ V
–0.5 ~ V
Unit
550 (Note 1)
V
V
–0.5 ~ +7.0
C
–65 ~ 150
Ratings
Limits
Typ.
CC
CC
M66252P/FP
+ 0.5
+ 0.5
Max.
0.55
–1.0
–5.0
100
0.8
1.0
5.0
10
15
0
thru Q
Unit
mW
Unit
mA
pF
pF
7
V
V
V
V
V
V
V
C
A
A
A
A
be-