sab-c161s-l25m Infineon Technologies Corporation, sab-c161s-l25m Datasheet - Page 67

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sab-c161s-l25m

Manufacturer Part Number
sab-c161s-l25m
Description
16-bit Single-chip Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet

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Part Number:
sab-c161s-l25m AA
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Table 19
ALE cycle time = 4 TCL + 2
Parameter
ALE high time
Address setup to ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
RD, WR low time
(with RW-delay)
RD, WR low time
(no RW-delay)
RD to valid data in
(with RW-delay)
RD to valid data in
(no RW-delay)
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay
Data float after RD rising
edge (no RW-delay
Data valid to WR
Data Sheet
Demultiplexed Bus (Reduced Supply Voltage Range)
(Operating Conditions apply)
1)
)
1)
)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5
6
8
9
12
13
14
15
16
17
18
20
21
22
t
A
+
t
C
CC 11 +
CC 5 +
CC 15 +
CC -10 +
CC 34 +
CC 59 +
SR –
SR –
SR –
SR –
SR 0
SR –
SR –
CC 24 +
+
t
F
Min.
Max. CPU Clock
(100 ns at 20 MHz CPU clock without waitstates)
t
= 20 MHz
A
63
t
t
t
t
t
A
A
t
C
C
C
A
Max.
22 +
47 +
45 +
t
57 +
2
36 +
2
15 +
2
A
t
t
t
A
A
A
+
+
+
+
t
C
t
t
t
t
t
C
C
F
F
C
1)
1)
1 / 2TCL = 1 to 20 MHz
Min.
TCL - 14
+
TCL - 20
+
TCL - 10
+
-10
+
2TCL - 16
+
3TCL - 16
+
0
2TCL - 26
+
Variable CPU Clock
t
t
t
t
t
t
t
A
A
A
A
C
C
C
Timing Characteristics
Max.
2TCL - 28
+
3TCL - 28
+
3TCL - 30
+
4TCL - 43
+ 2
2TCL - 14
+ 22
+
TCL - 10
+ 22
+
t
t
t
t
t
C
C
A
F
F
t
1)
1)
A
+
t
t
V1.0, 2003-11
A
A
+
t
C
t
C
C161S
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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