saf-xc888cm-8ffi5v Infineon Technologies Corporation, saf-xc888cm-8ffi5v Datasheet - Page 81

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saf-xc888cm-8ffi5v

Manufacturer Part Number
saf-xc888cm-8ffi5v
Description
8-bit Single-chip Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet

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PLL Mode
The system clock is derived from the oscillator clock, multiplied by the N factor, and
divided by the P and K factors. Both VCO bypass and PLL bypass must be inactive for
this PLL mode. The PLL mode is used during normal system operation.
System Frequency Selection
For the XC886/888, the value of P is fixed to 1. In order to obtain the required fsys, the
value of N and K can be selected by bits NDIV and KDIV respectively for different
oscillator inputs. The output frequency must always be configured for 96 MHz.
provides examples on how
sources.
Table 24
Oscillator
On-chip
External
Data Sheet
System frequency (
9.6 MHz
8 MHz
6 MHz
4 MHz
Fosc
f
sys
= 96 MHz can be obtained for the different oscillator
f
f
N
20
24
32
48
SYS
sys
=
= 96 MHz)
f
OSC
74
×
P
1
1
1
1
-------------
P K
N
×
K
2
2
2
2
Fsys
96 MHz
96 MHz
96 MHz
96 MHz
Functional Description
XC886/888CLM
V1.1, 2009-01
Table 24
(3.3)

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