saf-xc878m-16ffi5v Infineon Technologies Corporation, saf-xc878m-16ffi5v Datasheet - Page 95

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saf-xc878m-16ffi5v

Manufacturer Part Number
saf-xc878m-16ffi5v
Description
8-bit Single-chip Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet

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3.13
The XC87x provides two Universal Asynchronous Receiver/Transmitter (UART and
UART1) modules for full-duplex asynchronous reception/transmission. Both are also
receive-buffered, i.e., they can commence reception of a second byte before a
previously received byte has been read from the receive register. However, if the first
byte still has not been read by the time reception of the second byte is complete, one of
the bytes will be lost.
Features
The UART modules can operate in the four modes shown in
Table 30
Operating Mode
Mode 0: 8-bit shift register
Mode 1: 8-bit shift UART
Mode 2: 9-bit shift UART
Mode 3: 9-bit shift UART
1) For UART1 module, the baud rate is fixed at f
There are several ways to generate the baud rate clock for the serial port, depending on
the mode in which it is operating. In mode 0, the baud rate for the transfer is fixed at
f
and can be configured to either
available. The variable baud rate is set by the underflow rate on the dedicated baud-rate
generator. For UART module, the variable baud rate alternatively can be set by the
overflow rate on Timer 1.
3.13.1
Both UART modules have their own dedicated baud-rate generator, which is based on
a programmable 8-bit reload value, and includes divider stages (i.e., prescaler and
Data Sheet
PCLK
– Interrupt enabling and corresponding flag
Full-duplex asynchronous modes
– 8-bit or 9-bit data frames, LSB first
– Fixed or variable baud rate
Receive buffered
Multiprocessor communication
Interrupt generation on the completion of a data transmission or reception
/2. In mode 2, the baud rate is generated internally based on the UART input clock
UART and UART1
Baud-Rate Generator
UART Modes
f
PCLK
/32 or
PCLK
/64.
Baud Rate
f
Variable
f
Variable
f
PCLK
PCLK
88
PCLK
/2
/32 or
/64. For UART1 module, only
f
PCLK
/64
Table
1)
Functional Description
30.
XC87xCLM
V1.5, 2011-03
f
PCLK
/64 is

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