adm1069ast-reel Analog Devices, Inc., adm1069ast-reel Datasheet - Page 6
adm1069ast-reel
Manufacturer Part Number
adm1069ast-reel
Description
Super Sequencer With Margining Control
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADM1069AST-REEL.pdf
(36 pages)
- Current page: 6 of 36
- Download datasheet (834Kb)
ADM1069
Parameter
DIGITAL INPUTS (VXn, A0, A1)
SERIAL BUS DIGITAL INPUTS (SDA, SCL)
SERIAL BUS TIMING
SEQUENCING ENGINE TIMING
1
2
At least one of the VH, VPn pins must be ≥3.0 V to maintain the device supply on VDDCAP.
Specification is not production tested, but is supported by characterization data at initial product release.
Input High Voltage, V
Input Low Voltage, V
Input High Current, I
Input Low Current, I
Input Capacitance
Programmable Pull-Down Current, I
Input High Voltage, V
Input Low Voltage, V
Output Low Voltage, V
Clock Frequency, f
Bus Free Time, t
Start Setup Time, t
Start Hold Time, t
SCL Low Time, t
SCL High Time, t
SCL, SDA Rise Time, t
SCL, SDA Fall Time, t
Data Setup Time, t
Data Hold Time, t
Input Low Current, I
State Change Time
BUF
LOW
HIGH
HD;STA
HD;DAT
SCLK
SU;DAT
SU;STA
IL
IL
f
IL
IH
IL
r
IH
IH
OL
2
PULL-DOWN
Min
2.0
−1
2.0
4.7
4.7
4
4.7
4
250
5
Rev. A | Page 6 of 36
Typ
5
20
10
Max
0.8
1
0.8
0.4
400
1000
300
1
Unit
V
V
μA
μA
pF
μA
V
V
V
kHz
μs
μs
μs
μs
μs
μs
μs
ns
ns
μA
μs
Test Conditions/Comments
Maximum V
Maximum V
V
V
VDDCAP = 4.75 V, T
is required
I
V
OUT
IN
IN
IN
= 5.5 V
= 0
= 0
= −3.0 mA
IN
IN
= 5.5 V
= 5.5 V
A
= 25°C, if known logic state
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