mic3003gfltr Micrel Semiconductor, mic3003gfltr Datasheet - Page 69

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mic3003gfltr

Manufacturer Part Number
mic3003gfltr
Description
Fom Management Ic With Internal Calibration
Manufacturer
Micrel Semiconductor
Datasheet
Micrel, Inc.
July 2010
Bit(s)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
Default value
Serial address
Byte address
This register is non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access
to these registers.
read/write
D[7]
Function
SHDN output enable / disable
Lookup table temperature
offset control
Temperature result register
offset control
Polarity of TXFAULT
SMBus multipart support
OEM password location
SMBUS timeout enable /
disable
read/write
D[6]
read/write
D[5]
OEM Configuration 6 (OEMCFG6)
0000 0000 b = 00 h
A6 h
27 = 1B h
Operation
0: SHDN is enabled. TXFAULT will trigger the SHDN output
1: SHDN is disabled. TXFAULT has no effect on the SHDN output
This applies when pin 12 is set as the SHDN output
0: The temperature result used for the LUT access averaging algorithm does
not have the offset coefficient applied
1: The temperature result used for the LUT access averaging algorithm is
offset by the signed 6-bit (.5 C resolution) offset coefficient.
0: The temperature result register does not have the offset coefficient applied
1: The temperature result register is offset by the signed 6-bit (.5 C resolution)
offset coefficient.
0: TXFAULT is active-high
1: TXFAULT is active-low
0: Multipart mode off
1: Multipart mode on
0: A6h: 120-123 (78h-7Bh)
1: A6h: 123-126 (7Bh-7Eh)
0: SMBUS timeout enabled
1: SMBUS timeout disabled
read/write
D[4]
read/write
69
D[3]
read/write
D[2]
hbwhelp@micrel.com
read/write
D[1]
or (408) 955-1690
M9999-072910-A
read/write
MIC3003GFL
D[0]

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