lmh0346mh National Semiconductor Corporation, lmh0346mh Datasheet - Page 8

• Manufacturer Part Number: lmh0346mh
• Description: 3gbps Hd/sd Sdi Reclocker With Dual Differential Outputs
• Manufacturer: National Semiconductor Corporation

www.national.com
OPERATING SERIAL DATA RATES
This device operates at serial data rates of 270 Mbps, 1483
Mbps, 1485 Mbps, 2967 Mbps, and 2970 Mbps. The device
does not lock to harmonics of these rates. The device does
not lock and automatically enters the reclocker bypass mode
for the following data rates: 143 Mbps, 177 Mbps, 360 Mbps,
and 540 Mbps.
SERIAL DATA CLOCK/SERIAL DATA 2 OUTPUT
The Serial Data Clock/Serial Data 2 Output is controlled by
the SCO_EN input and provides either a second retimed se-
rial data output or a low jitter differential clock output appro-
priate to the serial data rate being processed. When operating
as a serial clock output, the rising edge of the clock will be
positioned within the corresponding serial data bit interval
within 10% of the center of the data interval.
Differential output SCO/SDO2 functions as the second serial
data output when the SCO_EN input is a logic-low level. This
output functions as the serial clock output when the SCO_EN
input is a logic-high level. The SCO_EN input has an internal
pull-down device and the default state of SCO_EN is low (se-
rial data output 2 enabled). SCO/SDO2 is muted when the
MUTE input is a logic low level. When the Bypass mode is
activated and this output is functioning as a serial clock out-
put, the output will also be muted.
Control Inputs and Indicator
Outputs
SERIAL DATA RATE SELECTOR
The Serial Data Rate Selector (RATE [1:0]) permits the user
to fix the operating serial data rate. The pins have internal pull-
downs which maintain a logic-low input condition unless ex-
ternally driven to a logic-high condition. This input also serves
to place the device in a test mode. The codes shown in
Table 1 select the desired operating serial data rate. The
LMH0346 then enters either the Auto-Rate Detect mode or a
single operating rate. Selecting the 270 Mbps rate mode may
also be used when reclocking DVB-ASI data. DVB-ASI data
is MPEG2 coded data that is transmitted in 8B10B coding.
The device will reclock this data without harmonic locking.
FIGURE 2. Equivalent SDO Output Circuit (SDO, SDO, SCO/SDO2, SCO/SDO2)
8
Auto-Rate Detect mode may be used for any supported data
rate, including DVB-ASI.
LOCK DETECT
The Lock Detect (LD) output, when high, indicates that data
is being received and the PLL is locked. LD may be connected
to the MUTE input to mute the data and clock outputs when
no data signal is being received. See Table 2.
MUTE
The MUTE input, when low, mutes the serial data and clock
outputs. It may be connected to Lock Detect or externally
driven to mute or un-mute the outputs. If MUTE is connected
to LD, then the data and clock outputs are muted when the
PLL is not locked. This function overrides the Bypass function:
see Table 2. MUTE has an internal pull-up device to enable
the output by default.
BYPASS/AUTO BYPASS
The Bypass/Auto Bypass input, when high, forces the device
to output the data without reclocking it. When this input is low,
the device automatically bypasses the reclocking function
when the device is in an unlocked condition or the detected
data rate is a rate which the device does not support. See
Table 2. BYPASS/AUTO BYPASS has an internal pull-down
device.
Rate [1:0]
Code
00
01
10
TABLE 1. Data Rate Select Input Codes
Auto-Rate
Detect
mode
270 Mbps
1483/1485
Mbps,
2967/2970
Mbps
Data Rate
or Mode
May be used to support DVB-
ASI operation
20215009
Comments