ata6838 ATMEL Corporation, ata6838 Datasheet
ata6838
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ata6838 Summary of contents
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... Serial Interface 5V and 3.3V Compatible MHz Clock Frequency • QFN24 Package 1. Description The ATA6838 is a fully protected hex half-bridge driver designed in Smart Power SOI technology, used to control different loads by a microcontroller in automotive and industrial applications. Each of the six high-side and six low-side drivers is capable of driving currents ...
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... Block Diagram QFN24 Input register Ouput register CLK INH Fault Detect Fault Detect 11 OUT1 ATA6838 [Preliminary ...
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... OUT4 SENSE 1 OUT4 OUT3 5 OUT3 SENSE YWW Date code (Y = Year above 2000 week number) ATAxyz Product name ZZZZZ Wafer lot number AL Assembly sub-lot number ATA6838 [Preliminary] 18 CLK GND SENSE VCC ...
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... DI expects a 16-bit control word with LSB being transferred first 20 OUT6 Output 6; see pin 1 21 OUT6 SENSE Only for testability in final test 22 OUT5 SENSE Only for testability in final test 23 OUT5 Output 5; see pin Internal bond to GND ATA6838 [Preliminary MHz) max 4954C–AUTO–09/07 ...
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... Open load detection (low = on) Programmable time delay for short circuit SCT (shutdown delay high/low = 12 ms/1.5 ms) Software inhibit; low = standby, high = normal operation SI (data transfer is not affected by standby function because the digital part is still powered) ATA6838 [Preliminary] LS5 HS5 LS6 HS6 SCT OLD 9 ...
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... Bit 11 (SI) (SCT) (OLD) (HS6) (LS6 ATA6838 [Preliminary] 6 Output Data Protocol Output (Status) Register Function Temperature prewarning: high = warning TP (overtemperature shutdown see remark below) Normal operation: high = output is on, low = output is off Open-load detection: high = open load, low = no open load ...
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... SRR bit in the input register, the SCD bit is reset and the disabled outputs are enabled. 3.6 Inhibit There are two ways to inhibit the ATA6838: • Set bit SI in the input register to 0 • Switch pin INH both cases, all output stages are turned off but the serial interface stays active. The output stages can be activated again by bit (when INH = VCC pin INH switched back to VCC (when ...
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... QFN24: Depends on the PCB-board Parameter Test Conditions Junction pin Junction ambient 6. Operating Range Parameter Test Conditions Supply voltage Logic supply voltage Logic input voltage Serial interface clock frequency Junction temperature range ATA6838 [Preliminary] 8 Pin Symbol VCC DI, ...
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... I VCC f OSC V VCC t VCC dPor dUV T jPWset T jPWreset T jPW T j switch off T j switch switch off T j switch off/ TjPW set ATA6838 [Preliminary] Min. Typ. Max 0.8 1 150 19 45 2.3 2.7 3 160 5.5 7.0 0 120 145 170 105 130 ...
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... Type means 100% tested 100% correlation tested Characterized on samples Design parameter Notes: 1. Delay time between rising edge of input signal at pin CS after data transmission and switch on/off output stages to 90% of final level. Device not in standby for t > 1 ms. ATA6838 [Preliminary] 10 < 150°C; unless otherwise specified, all values refer to GND pins. j ...
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... Symbol Pin VCC CLK VCC PDSI = 0V I PUSI = DOL = – DOH = V VCC < VCC ATA6838 [Preliminary] Min. Typ. Max. 0 VCC 0 VCC V 100 700 0 VCC 0 VCC V 50 500 – ...
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... DO rise time DO valid time CS setup time CS setup time CS high time CS high time CLK high time CLK low time CLK period time CLK setup time CLK setup time DI setup time DI hold time ATA6838 [Preliminary] 12 Test Conditions C = 100 100 100 ...
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... Figure 8-1. Serial Interface Timing Diagram with Chart Numbers CLK 3 DI CLK DO Inputs DI, CLK, CS: High level = 0.7 Output DO: High level = 0.8 4954C–AUTO–09/ low level = 0 low level = 0 ATA6838 [Preliminary ...
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... Application Circuit Figure 10-1. Application Circuit VCC S I Enable U5021M Watchdog Input register Ouput register CLK CS Fault Detect INH DO Fault VCC Detect ATA6838 [Preliminary] 14 Test Conditions ISO 7637-1 VDE 0879 Part 2 ESD S 5.1 ESD STM5. ...
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... Recommended value for capacitors at VCC: Electrolytic capacitor C > 10 µF in parallel with a ceramic capacitor C = 100 nF. • To reduce thermal resistance, place cooling areas on the PCB as close as possible to GND pins and to the die paddle in QFN24. 4954C–AUTO–09/07 ATA6838 [Preliminary] and V as close as possible to the power supply and CC S ...
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... Not indicated tolerances ±0. Drawing-No.: 6.543-5122.01-4 Issue: 1; 15.11.05 13. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 4954C-AUTO-09/07 4954B-AUTO-07/07 ATA6838 [Preliminary] 16 Package Remarks QFN24 Taped and reeled, Pb-free 0.9 ±0.1 +0 0.05 -0.05 19 ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2007 Atmel Corporation. All rights reserved. Atmel Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia ...