ptn3392 NXP Semiconductors, ptn3392 Datasheet - Page 6

• Manufacturer Part Number: ptn3392
• Description: 2-lane Displayport To Vga Adapter Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PTN3392
Product data sheet
Table 2.
[1]
Symbol
Strap pins, S[3:0]
S0
S1
S2
S3
Miscellaneous
RESET_N
CLK_O
LDOCAP_CORE 30
OSC_IN
OSC_OUT
LDOCAP_AUX
RRX
HVQFN48 package die supply ground is connected to both GND pins and exposed center pad. GND pins
7, 23, 28, 29, 41, 45, 48, and exposed center pad must be connected to supply ground for proper device
operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be
soldered to the board using a corresponding thermal pad on the board and for proper heat conduction
through the board, thermal vias need to be incorporated in the PCB in the thermal pad region.
Pin description
All information provided in this document is subject to legal disclaimers.
Pin
33
34
35
36
1
2
26
27
38
42
Rev. 2 — 15 July 2010
Type
input
input
input
input
input
output
power
input
output
power
input
…continued
crystal oscillator input
crystal oscillator output
1.8 V AUX supply decoupling
Description
Open (internal pull-down) = logic 0:
HIGH (external pull-up) = logic 1:
Default S0 = 0 for standard compliance.
reserved; leave open-circuit (default internal
pull-down)
Open (internal pull-down) = logic 0 to set
default I
HIGH (external pull-up) = logic 1, to set
default I
This pin may be left open-circuit (internal
pull-down) or tied to V
desired default I
explanation in
and DPCD register 00109h.
reserved; leave open-circuit (default internal
pull-down)
Hardware reset input (active LOW); internal
pull-up. A capacitor must be connected
between this pin and ground. A 1 μF capacitor
is recommended.
DisplayPort receiver test clock output
1.8 V digital core supply decoupling
Receiver termination resistance control. A
12 kΩ resistor must be connected between
this pin and LDOCAP_AUX (pin 38).
Implement VGA-side monitor detect
according to VESA DisplayPort Standard
v1.1a sections 7 and 8
Section 7.4.1
Set HPD HIGH upon VGA monitor
detection; set HPD LOW upon VGA monitor
detachment. Refer to
S0 = 1 behavior.
2-lane DisplayPort to VGA adapter IC
2
2
C speed to 100 kbit/s.
C speed to 10 kbit/s.
Table 3
for S0 = 0 behavior.
2
C speed. See more
DD
about S2 pin setting
Section 7.4.2
according to the
(Ref.
PTN3392
© NXP B.V. 2010. All rights reserved.
1). Refer to
for
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