sta333bwqs13tr STMicroelectronics, sta333bwqs13tr Datasheet - Page 55
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sta333bwqs13tr
Manufacturer Part Number
sta333bwqs13tr
Description
2.1-channel High-efficiency Digital Audio System With Qsound Qhd
Manufacturer
STMicroelectronics
Datasheet
1.STA333BWQS13TR.pdf
(71 pages)
- Current page: 55 of 71
- Download datasheet (2Mb)
STA333BWQS
6.12.17
Note:
Coefficient write/read control register
Coefficients for user-defined EQ, mixing, scaling, and bass management are handled
internally in the STA333BWQS via RAM. Access to this RAM is available to the user via an
I
contains a coefficient base address, five sets of three store the values of the 24-bit
coefficients to be written or that were read, and one contains bits used to control the
write/read of the coefficient(s) to/from RAM.
The read and write operation on RAM coefficients works only if LRCKI (pin 29) is switching.
Reading a coefficient from RAM
1.
2.
3.
4.
5.
Reading a set of coefficients from RAM
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Read middle 8-bits of coefficient a1 in I
11. Read bottom 8-bits of coefficient a1 in I
12. Read top 8-bits of coefficient a2 in I
13. Read middle 8-bits of coefficient a2 in I
14. Read bottom 8-bits of coefficient a2 in I
15. Read top 8-bits of coefficient b0 in I
16. Read middle 8-bits of coefficient b0 in I
17. Read bottom 8-bits of coefficient b0 in I
2
C register interface. A collection of I
D7
Write 6-bits of address to I
Write 1 to R1 bit in I
Read top 8-bits of coefficient in I
Read middle 8-bits of coefficient in I
Read bottom 8-bits of coefficient in I
Write 6-bits of address to I
Write 1 to RA bit in I
Read top 8-bits of coefficient in I
Read middle 8-bits of coefficient in I
Read bottom 8-bits of coefficient in I
Read top 8-bits of coefficient b2 in I
Read middle 8-bits of coefficient b2 in I
Read bottom 8-bits of coefficient b2 in I
Read top 8-bits of coefficient a1 in I
D6
2
2
C address 0x26.
C address 0x26.
D5
2
2
C register 0x16.
C register 0x16.
2
2
2
C address 0x17.
C address 0x17.
C registers are dedicated to this function. One
D4
2
2
2
2
2
2
2
2
C address 0x1A.
C address 0x1D.
C address 0x20.
C address 0x23.
C address 0x18.
C address 0x18.
C address 0x19.
C address 0x19.
2
2
2
2
2
2
2
2
C address 0x1B.
C address 0x1E.
C address 0x21.
C address 0x24.
C address 0x1C.
C address 0x1F.
C address 0x22.
C address 0x25.
RA
D3
0
D2
R1
0
Register description
WA
D1
0
W1
D0
0
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