z86230 ZiLOG Semiconductor, z86230 Datasheet - Page 25

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z86230

Manufacturer Part Number
z86230
Description
Advanced Violence Blocking And Ntsc Line 21 Xds
Manufacturer
ZiLOG Semiconductor
Datasheet

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6.
6.1 R
6.1.1 Serial Status Register
6.1.2 Configuration Register
PS000400-TVC0499
CONTROL REGISTERS
EGISTERS
S
UMMARY
R
Information controlling the setup and operation of the Z86230 are maintained in
several registers. The user may read or alter the contents of these registers as
required.
All register diagrams indicated in this section incorporate the following conven-
tions, unless otherwise noted:
T
D
be used as an indication of the presence of a video signal.
D
D
not read out and new data is written over it.
D
Reserved.
D
D
D
D
NOP
T
Bit
R/W
Bit
R/W
EGISTERS
ABLE
ABLE
0
1
2
3
4
5
6
7
–LOCK.
–FLD.
–ROVR.
–INTR.
–WOVR.
-Res.
-DAV.
–RDY.
R = Read, W = Write, X = Indeterminate, and res = Reserved
All register bits marked as res must be set to Low(0)
,
RESET
11. S
12. C
Reserved.
Signals the current video field. Low = Field 2, High = Field 1.
Active High, indicating that data is available to be read out.
Active High, indicating that the port input buffer is empty. Only the
S
Active High, indicating that an interrupt other than
Active High, indicating that the internal sync circuits are locked. May
UMMARY
Active High, indicating that the data available in the output buffer is
Active High, indicating a serial input data overrun.
ERIAL
ONFIGURATION
and
Z86230—PRELIMINARY
S
READ
RDY
res
TATUS
R
R
7
7
instructions may be sent if
R
DAV
R
res
EGISTER
R
R
6
6
EGISTER
res
res
R
R
5
5
(A
(A
DDRESS
DDRESS
WOVR
res
R
R
4
4
N
= 00h)
OT
INTR
res
R
RDY
R
R
3
3
EQUIRED
is Low.
ROVR
R/W
res
R
2
2
)
C
DAV
ONTROL
is pending.
FLD
res
1
R
1
R
R
EGISTERS
LOCK
TVS
R/W
R
0
0
25

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