cp2120 Silicon Laboratories, cp2120 Datasheet - Page 20

• Manufacturer Part Number: cp2120
• Description: Single Chip Spi To I2c Transfer Integrated Clock; No External Clock Required On-chip Voltage Monitor
• Manufacturer: Silicon Laboratories

CP2120
20
Internal Register Address:
Internal Register Address:
PCIO7.1
GPIO7
R/W
Bit 7
R/W
Bit 7
Internal Register Definition 8. IOCONFIG2: Port I/O Configuration 2
Reset Value:
Reset Value:
Bit 7-6:
Bit 5-4:
Bit 3-2:
Bit 1-0:
These bits select the port state for GPIO pins 7 through 4.
Bit 7-0:
PCIO7.0
GPIO6
Internal Register Definition 9. IOSTATE: Port I/O State
Bit 6
Bit 6
R/W
R/W
Write - Output appears on output pins.
0: GPIOx set to logic low output.
1: GPIO set to logic high output.
Read - Reads port state.
0: GPIOx is logic low.
1: GPIOx is logic high.
0x07
0x00
PCIO7.1-PCIO7.0: Port Configuration for GPIO Pin 7
PCIO6.1-PCIO6.0: Port Configuration for GPIO Pin 6
PCIO5.1-PCIO5.0: Port Configuration for GPIO Pin 5
PCIO4.1-PCIO4.0: Port Configuration for GPIO Pin 4
0x01
0x00
GPIO7-0: General Purpose Input/Output State
PCIO6.1
GPIO5
PCIOx.1
R/W
Bit 5
R/W
Bit 5
0
0
1
1
PCIO6.0
GPIO4
PCIOx.0
R/W
Bit 4
R/W
Bit 4
0
1
0
1
Rev. 0.3
PCIO5.1
Open Drain Output
Input Only
Push-Pull Output
Input Only
GPIO3
GPIO Pin x Mode
R/W
R/W
Bit3
Bit3
PCIO5.0
GPIO2
R/W
Bit 2
R/W
Bit 2
PCIO4.1
GPIO1
R/W
Bit 1
R/W
Bit 1
PCIO4.0
GPIO0
Bit 0
Bit 0
R/W
R/W